MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 148

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MC68HC711PH8

Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
8
8.1.4.5
The 16-bit read-only TCNT register contains the prescaled value of the 16-bit timer. A full counter
read addresses the more significant byte (MSB) first. A read of this address causes the less
significant byte (LSB) to be latched into a buffer for the next CPU cycle so that a double-byte read
returns the full 16-bit state of the counter at the time of the MSB read cycle.
TCNT resets to $0000.
8.1.4.6
The bits of this register specify the action taken as a result of a successful OCx compare.
OM[2:5] — Output mode
OL[2:5] — Output level
These control bit pairs are encoded to specify the action taken after a successful OCx compare.
OC5 functions only if the I4/O5 bit in the PACTL register is clear.
MOTOROLA
8-14
Timer count (TCNT) high
Timer count (TCNT) low
Timer control 1 (TCTL1)
TCNT — Timer counter register
TCTL1 — Timer control register 1
OMx
0
0
1
1
Address
Address
$000E (bit 15)
$000F
$0020
OLx
0
1
0
1
(bit 7)
OM2
bit 7
bit 7
TIMING SYSTEM
Timer disconnected from OCx pin logic
Toggle OCx output line
Clear OCx output line to 0
Set OCx output line to 1
Action taken on successful compare
bit 6
bit 6
OL2
(14)
(6)
OM3
bit 5
(13)
bit 5
(5)
bit 4
bit 4
OL3
(12)
(4)
OM4
bit 3
(11)
bit 3
(3)
bit 2
bit 2
OL4
(10)
(2)
OM5
bit 1
bit 1
(9)
(1)
MC68HC11PH8
(bit 8) 0000 0000
(bit 0) 0000 0000
bit 0
bit 0
OL5
0000 0000
on reset
on reset
State
State
TPG

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