MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 155

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

8.1.5.2
Bits of this register indicate the occurrence of timer system events. Coupled with the four
high-order bits of TMSK2, the bits of TFLG2 allow the timer subsystem to operate in either a polled
or interrupt driven system. Clear flags by writing a one to the corresponding bit position(s).
Note:
TOF — Timer overflow interrupt flag (refer to Section 8.1.4.10)
RTIF — Real-time interrupt flag
The RTIF status bit is automatically set to one at the end of every RTI period.
PAOVF — Pulse accumulator overflow interrupt flag (refer to Section 8.1.8)
PAIF — Pulse accumulator input edge interrupt flag (refer to Section 8.1.8)
Bits [3:0] — Not implemented; always read zero
MC68HC11PH8
Timer interrupt ßag 2 (TFLG2)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
Bits in TFLG2 correspond bit for bit with flag bits in TMSK2. Ones in TMSK2 enable the
corresponding interrupt sources.
TFLG2 — Timer interrupt flag register 2
–
–
TCNT has overflowed from $FFFF to $0000.
No timer overflow has occurred.
RTI period has elapsed.
RTI flag has been cleared.
Address
$0025
TOF
bit 7
TIMING SYSTEM
RTIF PAOVF PAIF
bit 6
bit 5
bit 4
bit 3
0
bit 2
0
bit 1
0
bit 0
0
MOTOROLA
0000 0000
on reset
State
TPG
8-21
8