MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 172

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

8
8.3.2.1
This 8-bit register contains the value that will be loaded into the timer A down-counter on the next
underflow. At reset, the timer A clock source is the EXTALi clock divided by 8, and the modulus
register is initialized to its highest value.
Because timer A is used to clock the COP watchdog in applications using the PLL clock
generation, it is not possible to stop timer A. For the same reason, a write of values $00 or $01 to
this register will not be loaded from the modulus register to the counter.
8.3.2.2
T8AI — 8-bit timer A interrupt enable
When set, an 8-bit modulus timer interrupt occurs when the timer reaches $00. At this time the
timer counter is loaded with the value stored in T8ADR and the 8-bit counter will continue to count
down at the selected clock rate.
T8AF — 8-bit timer A underflow flag
Set when 8-bit modulus timer A reaches $00. An interrupt is generated if enabled by T8AI. This bit
is cleared by a write to the T8ACR register with T8AF set.
Bits [5:3] — Not implemented; always read zero
CSA[2:0] — 8-bit timer A clock rate
These bits select the timer A clock, as shown in Table 8-6.
MOTOROLA
8-38
8-bit modulus timer A control (T8ACR) $005D
8-bit modulus timer A data (T8ADR)
1 (set)
0 (clear) –
T8ADR — 8-bit modulus timer A data register
T8ACR — 8-bit modulus timer A control register
–
Hardware interrupt requested when T8AF flag set.
Interrupt disabled.
Address
Address
$0059
(bit 7)
T8AI
bit 7
bit 7
TIMING SYSTEM
T8AF
bit 6
bit 6
(6)
bit 5
bit 5
(5)
0
bit 4
bit 4
(4)
0
bit 3
bit 3
(3)
0
CSA2 CSA1 CSA0 0000 0000
bit 2
bit 2
(2)
bit 1
bit 1
(1)
MC68HC11PH8
bit 0
bit 0
(0)
1111 1111
on reset
on reset
State
State
TPG