MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 173

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

8.3.2.3
This 8-bit register contains the value that will be loaded into the timer B down-counter at the next
underflow. At reset, timer B is stopped and the state of the modulus register is indeterminate.
8.3.2.4
T8BI — 8-bit timer B interrupt enable
When set, an 8-bit modulus timer interrupt occurs when the timer reaches $00. At this time the
timer counter is loaded with the value stored in T8BDR and the 8-bit counter will continue to count
down at the selected clock rate.
T8BF — 8-bit timer B underflow flag
Set when 8-bit modulus timer B reaches $00. An interrupt is generated if enabled by T8BI. This bit
is cleared by a write to the T8BCR register with T8BF set.
Bits [5, 4] — Not implemented; always read zero
PRB — 8-bit timer B preset
A write to the T8BCR register with this bit set will preset the timer B counter to the modulus register
value. The clock must be stopped before writing to the register. This bit always reads as 0.
CSB[2:0] — 8-bit timer B clock rate
These bits select the timer B clock, as shown in Table 8-6. At reset, timer B is not clocked.
MC68HC11PH8
8-bit modulus timer B control (T8BCR) $005E
8-bit modulus timer B data (T8BDR)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
T8BDR — 8-bit modulus timer B data register
T8BCR — 8-bit modulus timer B control register
–
–
Hardware interrupt requested when T8BF flag set.
Interrupt disabled.
Underflow has occurred.
No underflow has occurred.
Address
Address
$005A
(bit 7)
T8BI
bit 7
bit 7
TIMING SYSTEM
T8BF
bit 6
bit 6
(6)
bit 5
bit 5
(5)
0
bit 4
bit 4
(4)
0
PRB
bit 3
bit 3
(3)
CSB2 CSB1 CSB0 0000 0000
bit 2
bit 2
(2)
bit 1
bit 1
(1)
bit 0
bit 0
(0)
MOTOROLA
undeÞned
on reset
on reset
State
State
TPG
8-39
8