MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 179

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

9.1.7
The A/D conversion sequence begins one E clock cycle after a write to the A/D control/status
register, ADCTL. The bits in ADCTL select the channel and the mode of conversion.
An input voltage equal to V
(full scale), with no overflow indication. For ratiometric conversions of this type, the source of each
analog input should use V
9.2
ADPU (bit 7 of the OPTION register) controls A/D converter power up. Clearing ADPU removes
power from and disables the A/D converter system; setting ADPU enables the A/D converter
system. After the A/D converter is turned on, the analog bias voltages will take up to 100 s to
stabilize.
When the A/D converter system is operating from the MCU E clock, all switching and comparator
operations are synchronized to the MCU clocks. This allows the comparator results to be sampled
at ‘quiet’ times, which minimizes noise errors. The internal RC oscillator is asynchronous with
respect to the MCU clock, so noise can affect the A/D converter results. This results in a slightly
lower typical accuracy when using the internal oscillator (CSEL = 1).
9.2.1
The 8-bit special-purpose OPTION register sets internal system configuration options during
initialization. The time protected control bits, IRQE, DLY, FCME and CR[1:0] can be written to only
once in the first 64 cycles after a reset and then they become read-only bits. This minimizes the
possibility of any accidental changes to the system configuration. They may be written at any time
in special modes.
ADPU — A/D power-up
After enabling the A/D power, at least 100 s should be allowed for system stabilization.
MC68HC11PH8
System conÞg. options 1 (OPTION)
1 (set)
0 (clear) –
Conversion process
A/D converter power-up and clock select
OPTION — System configuration options register 1
–
A/D system power enabled.
A/D system disabled, to reduce supply current.
RH
RL
Address
as the supply voltage and be referenced to V
ANALOG-TO-DIGITAL CONVERTER
$0039
converts to $00 and an input voltage equal to V
ADPU CSEL
bit 7
bit 6
IRQE
bit 5
bit 4
DLY
CME
bit 3
FCME
bit 2
RL
CR1
bit 1
.
RH
converts to $FF
CR0
bit 0
MOTOROLA
0001 0000
on reset
State
TPG
9-5
9