MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 183

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MC68HC711PH8

Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
MULT — Multiple-channel/single-channel control
When this bit is clear, the A/D converter system is configured to perform four consecutive
conversions on the single channel specified by the four channel select bits CD–CA (bits 3–0 of the
ADCTL register). When this bit is set, the A/D system is configured to perform a conversion on
each of the four channels where each result register corresponds to one channel.
Note:
CD–CA — Channel selects D–A
When a multiple channel mode is selected (MULT = 1), the two least significant channel select bits
(CB and CA) have no meaning and the CD and CC bits specify which group of four channels is to
be converted.
MC68HC11PH8
1 (set)
0 (clear) –
When the multiple-channel continuous scan mode is used, extra care is needed in the
design of circuitry driving the A/D inputs. The charge on the capacitive DAC array before
the sample time is related to the voltage on the previously converted channel. A charge
share situation exists between the internal DAC capacitance and the external circuit
capacitance. Although the amount of charge involved is small, the rate at which it is
repeated is every 64 s for an E clock of 2 MHz. The RC charging rate of the external circuit
must be balanced against this charge sharing effect to avoid errors in accuracy. Refer to the
M68HC11 Reference Manual (M68HC11RM/AD) for further information.
Each A/D channel has a result register allocated to it.
Four consecutive conversions from the same A/D channel are stored
in the results registers.
ANALOG-TO-DIGITAL CONVERTER
Channel select
CD:CC:CB:CA
control bits
1 0 X X
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
reserved
Channel
reserved
V
signal
V
V
RH
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
RH
RL
)
/2
(1)
(1)
(1)
(1
Result in ADRx
if MULT = 1
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
Ñ
MOTOROLA
TPG
9-9
9

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