MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 191
MC68HC711PH8
Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
1.MC68HC711PH8.pdf
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PAREN — Pull-up assignment register enable (refer to Section 4)
NOSEC — EEPROM security disabled (refer to Section 3)
NOCOP — COP system disable
ROMON — ROM/ EPROM enable (refer to Section 3)
EEON — EEPROM enable (refer to Section 3)
10.2
When a reset condition is recognized, the internal registers and control bits are forced to an initial
state. Depending on the cause of the reset and the operating mode, the reset vector can be
fetched from any of six possible locations, as shown in Table 10-3.
These initial states then control on-chip peripheral systems to force them to known start-up states,
as described in the following paragraphs.
MC68HC11PH8
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
Effects of reset
–
–
–
–
–
Table 10-3 Reset cause, reset vector and operating mode
POR or RESET pin
Clock monitor failure
COP watchdog timeout
PPAR register enabled; pull-ups can be enabled using PPAR.
PPAR register disabled; all pull-ups disabled.
Disable security.
Enable security.
COP system disabled.
COP system enabled (forces reset on timeout).
ROM/ EPROM included in the memory map.
ROM/ EPROM excluded from the memory map.
EEPROM included in the memory map.
EEPROM excluded from the memory map.
Cause of reset
RESETS AND INTERRUPTS
Normal mode vector Special test or bootstrap
$FFFC, $FFFD
$FFFE, $FFFF
$FFFA, $FFFB
$BFFC, $BFFD
$BFFE, $BFFF
$BFFA, $BFFB
MOTOROLA
TPG
10-7
10
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