MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 196

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MC68HC711PH8

Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
10
10.3.1
RBOOT, SMOD, and MDA bits depend on power-up initialization mode and can only be written in
special modes when SMOD = 1. Refer to Table 3-4.
RBOOT — Read bootstrap ROM (refer to Section 3)
SMOD — Special mode select (refer to Section 3)
MDA — Mode select A (refer to Section 3)
PSEL[4:0] — Priority select bits
These bits select one interrupt source to be elevated above all other I-bit-related sources and can
be written to only while the I-bit in the CCR is set (interrupts disabled). See Table 10-4.
MOTOROLA
10-12
Highest priority interrupt (HPRIO)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
HPRIO — Highest priority I-bit interrupt and misc. register
Bootloader ROM enabled, at $BE40–$BFFF.
Bootloader ROM disabled and not in map.
Special mode variation in effect.
Normal mode variation in effect.
Normal expanded or special test mode in effect.
Normal single chip or special bootstrap mode in effect.
Address
$003C RBOOT SMOD
RESETS AND INTERRUPTS
bit 7
bit 6
MDA PSEL4 PSEL3 PSEL2 PSEL1 PSEL0 xxx0 0110
bit 5
bit 4
bit 3
bit 2
bit 1
MC68HC11PH8
bit 0
on reset
State
TPG

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