MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 212
MC68HC711PH8
Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
1.MC68HC711PH8.pdf
(264 pages)
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11
11.1.1
Accumulators A and B are general purpose 8-bit registers that hold operands and results of
arithmetic calculations or data manipulations. For some instructions, these two accumulators are
treated as a single double-byte (16-bit) accumulator called accumulator D. Although most
operations can use accumulators A or B interchangeably, the following exceptions apply:
•
•
•
•
11.1.2
The IX register provides a 16-bit indexing value that can be added to the 8-bit offset provided in
an instruction to create an effective address. The IX register can also be used as a counter or as
a temporary storage register.
11.1.3
The 16-bit IY register performs an indexed mode function similar to that of the IX register.
However, most instructions using the IY register require an extra byte of machine code and an
extra cycle of execution time because of the way the opcode map is implemented. Refer to Section
11.3 for further information.
11.1.4
The M68HC11 CPU has an automatic program stack. This stack can be located anywhere in the
address space and can be any size up to the amount of memory available in the system. Normally
the SP is initialized by one of the first instructions in an application program. The stack is
configured as a data structure that grows downward from high memory to low memory. Each time
a new byte is pushed onto the stack, the SP is decremented. Each time a byte is pulled from the
stack, the SP is incremented. At any given time, the SP holds the 16-bit address of the next free
location in the stack. Figure 11-2 is a summary of SP operations.
MOTOROLA
11-2
The ABX and ABY instructions add the contents of 8-bit accumulator B to the contents of 16-bit
register X or Y, but there are no equivalent instructions that use A instead of B.
The TAP and TPA instructions transfer data from accumulator A to the condition code register,
or from the condition code register to accumulator A, however, there are no equivalent
instructions that use B rather than A.
The decimal adjust accumulator A (DAA) instruction is used after binary-coded decimal (BCD)
arithmetic operations, but there is no equivalent BCD instruction to adjust accumulator B.
The add, subtract, and compare instructions associated with both A and B (ABA, SBA, and
CBA) only operate in one direction, making it important to plan ahead to ensure the correct
operand is in the correct accumulator.
Accumulators A, B and D
Index register X (IX)
Index register Y (IY)
Stack pointer (SP)
CPU CORE AND INSTRUCTION SET
MC68HC11PH8
TPG
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