MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 217

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

11.3
The M68HC11 family of microcontrollers uses 8-bit opcodes. Each opcode identifies a particular
instruction and associated addressing mode to the CPU. Several opcodes are required to provide
each instruction with a range of addressing capabilities. Only 256 opcodes would be available if
the range of values were restricted to the number able to be expressed in 8-bit binary numbers.
A four-page opcode map has been implemented to expand the number of instructions. An
additional byte, called a prebyte, directs the processor from page 0 of the opcode map to one of
the other three pages. As its name implies, the additional byte precedes the opcode.
A complete instruction consists of a prebyte, if any, an opcode, and zero, one, two, or three
operands. The operands contain information the CPU needs for executing the instruction.
Complete instructions can be from one to five bytes long.
11.4
Six addressing modes; immediate, direct, extended, indexed, inherent, and relative, detailed in the
following paragraphs, can be used to access memory. All modes except inherent mode use an
effective address. The effective address is the memory address from which the argument is
fetched or stored, or the address from which execution is to proceed. The effective address can
be specified within an instruction, or it can be calculated.
11.4.1
In the immediate addressing mode an argument is contained in the byte(s) immediately following
the opcode. The number of bytes following the opcode matches the size of the register or memory
location being operated on. There are two, three, and four (if prebyte is required) byte immediate
instructions. The effective address is the address of the byte following the instruction.
11.4.2
In the direct addressing mode, the low-order byte of the operand address is contained in a single
byte following the opcode, and the high-order byte of the address is assumed to be $00.
Addresses $00–$FF are thus accessed directly, using two-byte instructions. Execution time is
reduced by eliminating the additional memory access required for the high-order address byte. In
most applications, this 256-byte area is reserved for frequently referenced data. In M68HC11
MCUs, the memory map can be configured for combinations of internal registers, RAM, or
external memory to occupy these addresses.
MC68HC11PH8
Opcodes and operands
Addressing modes
Immediate (IMM)
Direct (DIR)
CPU CORE AND INSTRUCTION SET
MOTOROLA
TPG
11-7
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