MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 230

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

12
1.5
MOTOROLA
A-6
(1) All timing is given with respect to 20% and 70% of V
(2) Reset is recognized during the Þrst clock cycle it is held low. Internal circuitry then drives the pin low for eight clock cycles,
(3) To guarantee an external reset vector.
(4) This is the minimum input time; it can be pre-empted by an internal reset.
(V
Frequency of operation
E clock period
Crystal frequency
External oscillator frequency
Processor control set-up time
Reset input pulse width
Mode programming set-up time
Mode programming hold time
Interrupt pulse width (IRQ edge sensitive mode)
Timer pulse width
(Input capture and pulse accumulator inputs)
WAIT recovery start-up time
Clock monitor reset
DD
releases the pin and samples the pin level four cycles later to determine the source of the interrupt. (See Section 10.)
Notes
(1) Rising edge sensitive input.
(2) Falling edge sensitive input.
(3) Maximum pulse accumulator clocking rate is E clock frequency divided by two (E/2).
= 5.0 Vdc 10%, V
Characteristic
Control timing
PA[3:0]
PA[3:0]
PA7
PA7
(1), (3)
(2), (3)
(2)
SS
(1)
(2)
= 0 Vdc, T
(t
PCSU
ELECTRICAL SPECIFICATIONS (STANDARD)
(1)
= t
CYC
A
= T
/4 + 50ns)
L
PW
to T
Figure A-2 Timer inputs
TIM
H
)
PW
PW
Symbol
PW
PW
f
t
f
t
t
CMON
t
4f
PCSU
t
XTAL
WRS
f
MPS
MPH
CYC
(3)
(4)
DD
OP
OP
RSTL
RSTL
IRQ
TIM
, unless otherwise noted.
Min.
t
t
500
175
+20
+20
CYC
CYC
16
10
10
Ñ
Ñ
0
0
1
2
2.0MHz
Max.
200
2.0
8.0
8.0
Ñ
Ñ
Ñ
Ñ
Ñ
Ñ
Ñ
Ñ
4
Min.
t
t
333
133
+20
+20
CYC
CYC
Ñ
16
10
Ñ
10
0
0
1
2
3.0MHz
Max.
12.0
12.0
200
3.0
Ñ
Ñ
Ñ
Ñ
Ñ
Ñ
Ñ
Ñ
4
Min.
t
t
+20
+20
250
112
CYC
CYC
16
10
10
Ñ
Ñ
0
0
1
2
4.0MHz
MC68HC11PH8
Max.
16.0
16.0
200
4.0
Ñ
Ñ
Ñ
Ñ
Ñ
Ñ
Ñ
Ñ
4
MHz
MHz
MHz
Unit
t
t
t
kHz
CYC
CYC
CYC
ns
ns
ns
ns
ns
TPG