MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 37

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MC68HC711PH8

Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
2.5.4.2
The PLL frequency synthesizer multiplies the frequency of the input oscillator. The multiplication
factor is software programmable via a loop divider, which consists of a six-bit modulo N counter,
with a further two bit scaling factor.
The multiplication factor is given by 2(Y + 1)2
Bits in SYNR can be read at any time but can only be written if PLLON = 0.
Note:
SYNX[1:0]
These bits program the binary taps (divide by 1, 2, 4 and 8). Reset clears these bits.
SYNY[5:0]
These bits program the six-bit modulo N (1 to 64) counter. Reset sets these bits to %001011.
Note:
MC68HC11PH8
Synthesizer program (SYNR)
Exceeding recommended operating frequencies can result in indeterminate MCU
operation.
The resolution of the multiplication factors decreases by a factor of two, as X increases:
SYNR — Synthesizer program register
Address
$002F SYNX1 SYNX0 SYNY5 SYNY4 SYNY3 SYNY2 SYNY1 SYNY0 0000 1011
X
0
1
2
3
bit 7
PIN DESCRIPTIONS
0 Ð 63
0 Ð 63
0 Ð 63
0 Ð 63
Y
bit 6
X
, where 0
2, 4, 6, 8, É, 128
4, 8, 12, 16, É, 256
8, 16, 24, 32, É, 512
16, 32, 48, 64, É, 1024
Possible multipliers
bit 5
bit 4
X
3 and 0 Y
bit 3
bit 2
bit 1
63.
bit 0
MOTOROLA
on reset
State
TPG
2-11
2

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