MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 50

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

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08/Apr/97@13:55 [DS97 v 4.1]
3.2.1
Memory locations for on-chip resources are the same for both expanded and single chip modes. The
128-byte register block originates at $0000 after reset and can be placed at any other 4K boundary
($x000) after reset by writing an appropriate value to the INIT register. Refer to Figure 3-1, which shows
the memory map.
The on-board 2K byte RAM is initially located at $0080 after reset. The RAM is divided into two
sections, of 128 bytes and 1920 bytes. If RAM and registers are both mapped to the same 4K
boundary, RAM starts at $x080 and 128 bytes are remapped at $x800–$x87F. Otherwise, RAM
starts at $x000. See Figure 3-3.
Remapping is accomplished by writing appropriate values into the two nibbles of the INIT register.
See Section 3.3.2.2.
The 768-byte EEPROM is initially located at $0D00 after reset, when EEPROM is enabled in the
memory map by the CONFIG register. EEPROM can be placed in any other 4K page ($xD00) by
writing to the INIT2 register.
The ROMAD and ROMON bits in the CONFIG register control the position and presence of ROM,
or EPROM , in the memory map. In special test mode, the ROMON bit is cleared so the ROM is
removed from the memory map. In single chip mode, the ROMAD bit is set to one after reset,
which enables the ROM at $4000–$FFFF. In expanded mode, the ROM may be enabled from
$0000–$BFFF (ROMAD = 0) to allow an external memory to contain the interrupt vectors and
initialization code.
In special bootstrap mode, a bootloader ROM is enabled at locations $BE40–$BFFF. The vectors
for special bootstrap mode are contained in the bootloader program. The boot ROM occupies a
512 byte block of the memory map, though not all locations are used.
3.2.1.1
The MC68HC11PH8 has 2K bytes of fully static RAM that are used for storing instructions,
variables and temporary data during program execution. RAM can be placed at any 4K boundary
in the 64K byte address space by writing an appropriate value to the INIT register.
By default, RAM is initially located at $0080 in the memory map. Direct addressing mode can
access the first 128 locations of RAM using a one-byte address operand. Direct mode accesses
save program memory space and execution time. Registers can be moved to other boundaries to
allow 256 bytes of RAM to be located in direct addressing space. See Figure 3-3.
The on-chip RAM is a fully static memory. RAM contents can be preserved during periods of
processor inactivity by either of two methods, both of which reduce power consumption:
MOTOROLA
3-4
Mapping allocations
RAM
OPERATING MODES AND ON-CHIP MEMORY
—this line does not form part of the document—
PH8.DS03/Modes+mem
MC68HC11PH8
TPG