MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 56

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

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08/Apr/97@13:55 [DS97 v 4.1]
3.3
Registers and bits that control initialization and the basic operation of the MCU are protected
against writes except under special circumstances. The following table lists registers that can be
written only once after reset, or that must be written within the first 64 cycles after reset.
3.3.1
The four mode variations are selected by the logic states of the mode A (MODA) and mode B
(MODB) pins during reset. The MODA and MODB logic levels determine the logic state of special
mode (SMOD) and the mode A (MDA) control bits in the highest priority I-bit interrupt and
miscellaneous (HPRIO) register.
After reset is released, the mode select pins no longer influence the MCU operating mode. In
single chip operating mode, MODA pin is connected to a logic zero. In expanded mode, MODA is
normally connected to V
the load instruction register (LIR) pin when the MCU is not in reset. The open-drain active low LIR
output pin drives low during the first E cycle of each instruction, if enabled by the LIRDV bit in the
OPT2 register. The MODB pin also functions as the stand-by power input (VSTBY), which allows
the RAM contents to be maintained in the absence of V
MOTOROLA
3-10
(1) When SMOD = 0, bits 1 and 0 can be written only once, during the Þrst 64 cycles, after
(2) Bit 0 (LCDE) can be written only once.
(3) Bits can be written to zero once and only in the Þrst 64 cycles or in special modes. Bits can
(4) Bit 0 (DISE) and bit 1 (EXT4X) can be written only once; bit 4 (IRVNE) can be written only
(5) Bits 5, 4, 2, 1, and 0 can be written once and only in the Þrst 64 cycles; when SMOD = 1,
(6) When SMOD = 0, bits can be written only once, during the Þrst 64 cycles, after which the
System initialization
Mode selection
Register
address
$x02D
$x03D
$x024
$x035
$x037
$x038
$x039
which they become read-only. When SMOD = 1, however, these bits can be written at any
time. All other bits can be written at any time.
be set to one at any time.
once in single chip and user expanded modes.
however, bits 5, 4, 2, 1, and 0 can be written at any time. All other bits can be written at any time.
register becomes read-only. When SMOD = 1, bits can be written at any time.
Timer interrupt mask register 2 (TMSK2)
LCD control and data register (LCDR)
Block protect register (BPROT)
EEPROM mapping register (INIT2)
System conÞguration options register 2 (OPT2)
System conÞguration options register (OPTION)
RAM and I/O map register (INIT)
OPERATING MODES AND ON-CHIP MEMORY
DD
Table 3-3 Registers with limited write access
through a pull-up resistor of 4.7 k . The MODA pin also functions as
—this line does not form part of the document—
Register
name
DD
.
Must be written in
Þrst 64 cycles
No
No
No
(1)
(3)
(5)
(6)
once only
Write
Yes
PH8.DS03/Modes+mem
Ñ
(2)
Ñ
(4)
Ñ
Ñ
MC68HC11PH8
TPG