MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 71

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

PH8.DS03/Modes+mem
resident EPROM programming utility), along with instructions to set the X and Y index registers to
default values. The utility program receives programming data from an external host and puts it in
EPROM. The value in IX determines programming delay time; for example, at 4 MHz operation, a
delay constant of 8000 in IX will give a 2ms delay time. The value in IY is a pointer to the first
address in EPROM to be programmed (normally = $4000). When the utility program is ready to
receive programming data, it sends the host an $FF character; then it waits. When the host sees
the $FF character, the EPROM programming data is sent, starting with location $4000. After the
last byte to be programmed is sent and the corresponding verification data is returned, the
programming operation is terminated by resetting the MCU.
3.4.2
The 768-byte on-board EEPROM is initially located from $0D00 to $0FFF after reset in all modes. It
can be mapped to any other 4K page by writing to the INIT2 register. The EEPROM is enabled by the
EEON bit in the CONFIG register. Programming and erasing are controlled by the PPROG register.
Unlike information stored in ROM, data in the 768 bytes of EEPROM can be erased and
reprogrammed under software control. Because programming and erasing operations use an
on-chip charge pump driven by V
An internal charge pump supplies the programming voltage. Use of the block protect register
(BPROT) prevents inadvertent writes to (or erases of) blocks of EEPROM (see Section 3.3.2.6).
The CSEL bit in the OPTION register selects an on-chip oscillator clock for programming and
erasing the EEPROM while operating at frequencies below 1MHz.
In special modes there is one extra row of EEPROM, which is used for factory testing. Endurance
and data retention specifications do not apply to these cells.
The erased state of each EEPROM byte is $FF.
3.4.2.1
Note:
ODD — Program odd rows in half of EEPROM (Test)
EVEN — Program even rows in half of EEPROM (Test)
If both ODD and EVEN are set to one then all odd and even rows in half of the EEPROM will be
programmed with the same data, within one programming cycle.
Bit 5 — Not implemented; always reads zero.
MC68HC11PH8
EEPROM programming (PPROG)
Writes to EEPROM addresses are inhibited while EEPGM is one. A write to a different
EEPROM location is prevented while a program or erase operation is in progress.
EEPROM
PPROG — EEPROM programming control register
OPERATING MODES AND ON-CHIP MEMORY
Address
—this line does not form part of the document—
$003B
DD
, a separate external power supply is not required.
ODD
bit 7
EVEN
bit 6
bit 5
0
BYTE
bit 4
ROW ERASE EELAT EEPGM 0000 0000
bit 3
bit 2
[DS97 v 4.1] 08/Apr/97@13:55
bit 1
bit 0
MOTOROLA
on reset
State
TPG
3-25
10
12
13
14
15
11
1
2
3
4
5
6
7
8
9