MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 81

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MC68HC711PH8

Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
4.2
Port B is an 8-bit bidirectional port, with both data and data direction registers. In addition to their
I/O capability, port B pins are used as the non-multiplexed high order address pins, as shown in
the following table.
The state of the pins on reset is mode dependent. In single chip or bootstrap mode, port B pins
are high-impedance inputs with selectable internal pull-up resistors (see Section 4.9). In
expanded or test mode, port B pins are high order address outputs and PORTB/DDRB are not in
the memory map. Alternatively, four LCD segment drivers can be enabled, in all modes, on
PB4–PB7 (See Section 2.12).
4.2.1
The bits may be read and written at any time and are not affected by reset.
4.2.2
DDB[7:0] — Data direction for port B
MC68HC11PH8
Data direction B (DDRB)
Port B data (PORTB)
1 (set)
0 (clear) –
Port B
PORTB — Port B data register
DDRB — Data direction register for port B
The corresponding pin is configured as an output.
The corresponding pin is configured as an input.
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
Pin
Address
Address
$0004
$0002
PARALLEL INPUT/OUTPUT
DDB7 DDB6 DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 0000 0000
A14/ LCD6
bit 7
PB7
bit 7
A12/LCD4
A13/LCD5
A15/LCD7
Alternate
function
A10
A11
A8
A9
bit 6
PB6
bit 6
bit 5
PB5
bit 5
bit 4
PB4
bit 4
In expanded or test
mode, the pins
become the high
order address lines
and port B is not
included in the
memory map.
bit 3
PB3
bit 3
bit 2
PB2
bit 2
bit 1
PB1
bit 1
bit 0
PB0
bit 0
MOTOROLA
undeÞned
on reset
on reset
State
State
TPG
4-3
4

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