MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 90

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

4
4.10.1
LIRDV — LIR driven (refer to Section 3)
CWOM — Port C wired-OR mode
STRCH — Stretch external accesses (refer to Section 3)
IRVNE — Internal read visibility/not E (refer to Section 3)
In single chip mode this bit determines whether the E clock drives out from the chip.
LSBF — LSB first enable (refer to Section 7)
SPR2 — SPI1 clock rate select (refer to Section 7)
EXT4X — 4XLCK or EXTAL clock output select (refer to Section 3
MOTOROLA
4-12
System conÞg. options 2 (OPT2)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
OPT2 — System configuration options register 2
–
–
–
–
–
–
–
Enable LIR push-pull drive.
LIR not driven on MODA/LIR pin.
Port C outputs are open-drain.
Port C operates normally.
Off-chip accesses are extended by one E clock cycle.
Normal operation.
Data from internal reads is driven out of the external data bus.
No visibility of internal reads on external bus.
E pin is driven low.
E clock is driven out from the chip.
SPI1 data is transferred LSB first.
SPI1 data is transferred MSB first.
EXTALi clock output on the 4XOUT pin.
4XCLK clock output on the 4XOUT pin.
Address
$0038
PARALLEL INPUT/OUTPUT
LIRDV CWOM STRCH IRVNE LSBF
bit 7
bit 6
bit 5
bit 4
bit 3
SPR2 EXT4X DISE x00x 0000
bit 2
bit 1
MC68HC11PH8
bit 0
on reset
State
TPG