MC68HC711xxxx Motorola, MC68HC711xxxx Datasheet - Page 128
MC68HC711xxxx
Manufacturer Part Number
MC68HC711xxxx
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC68HC711XXXX.pdf
(268 pages)
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Serial Communications Interface (SCI)
Data Sheet
128
SCR[2:0] — SCI Baud Rate Select Bits
Selects receiver and transmitter bit rate based on output from baud rate
prescaler stage. Refer to
The prescaler bits, SCP[2:0], determine the highest baud rate, and the SCR[2:0]
bits select an additional binary submultiple (÷1, ÷2, ÷4, through ÷128) of this
highest baud rate. The result of these two dividers in series is the 16X receiver
baud rate clock. The SCR[2:0] bits are not affected by reset and can be changed
at any time, although they should not be changed when any SCI transfer is in
progress.
Figure 7-8
prescaler select bits determine the highest baud rate. The rate select bits
determine additional divide by two stages to arrive at the receiver timing (RT)
clock rate. The baud rate clock is the result of dividing the RT clock by 16.
XTAL
EXTAL
Figure 7-8. SCI Baud Rate Generator Block Diagram
Serial Communications Interface (SCI)
and
CLOCK GENERATOR
Figure 7-9
OSCILLATOR
AND
(÷4)
Figure 7-8
illustrate the SCI baud rate timing chain. The
AS
E
÷
÷
÷
÷
÷
÷
÷
2
2
2
2
2
2
2
and
0:0
Figure
SCR[2:0]
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
÷
3
INTERNAL BUS CLOCK (PH2)
0:1
7-9.
÷
M68HC11E Family — Rev. 5
4
1:0
BAUD RATE
BAUD RATE
TRANSMIT
RECEIVE
÷
(16X)
÷
(1X)
SCI
SCI
13
16
1:1
SCP[1:0]
MOTOROLA
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