MC68HC711xxxx Motorola, MC68HC711xxxx Datasheet - Page 134
MC68HC711xxxx
Manufacturer Part Number
MC68HC711xxxx
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC68HC711XXXX.pdf
(268 pages)
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Serial Peripheral Interface (SPI)
8.3 SPI Transfer Formats
Data Sheet
134
÷2 ÷4 ÷16 ÷32
MCU CLOCK
INTERNAL
SELECT
DIVIDER
SPI STATUS REGISTER
SPI CONTROL
During an SPI transfer, data is simultaneously transmitted and received. A serial
clock line synchronizes shifting and sampling of the information on the two serial
data lines. A slave select line allows individual selection of a slave SPI device;
slave devices that are not selected do not interfere with SPI bus activities. On a
master SPI device, the select line can optionally be used to indicate a multiple
master bus contention. Refer to
SPI INTERRUPT
REQUEST
Figure 8-1. SPI Block Diagram
Serial Peripheral Interface (SPI)
MSB
8--BIT SHIFT REGISTER
INTERNAL
DATA BUS
READ DATA BUFFER
MSTR
SPE
SPI CONTROL REGISTER
Figure
CLOCK
LOGIC
LSB
CLOCK
8-2.
S
M
M
S
S
M
M68HC11E Family — Rev. 5
MISO
MOSI
PD2
PD3
SCK
PD4
PD5
SS
MOTOROLA
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