MC68HC711xxxx Motorola, MC68HC711xxxx Datasheet - Page 158

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MC68HC711xxxx

Manufacturer Part Number
MC68HC711xxxx
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
Timing System
9.5.2 Timer Interrupt Flag Register 2
Data Sheet
158
Bits of this register indicate the occurrence of timer system events. Coupled with
the four high-order bits of TMSK2, the bits of TFLG2 allow the timer subsystem to
operate in either a polled or interrupt driven system. Each bit of TFLG2
corresponds to a bit in TMSK2 in the same position.
Clear flags by writing a 1 to the corresponding bit position(s).
TOF — Timer Overflow Interrupt Flag
RTIF — Real-Time Interrupt Flag
PAOVF — Pulse Accumulator Overflow Interrupt Flag
PAIF — Pulse Accumulator Input Edge Interrupt Flag
Bits [3:0] — Unimplemented
Set when TCNT changes from $FFFF to $0000
The RTIF status bit is automatically set to 1 at the end of every RTI period. To
clear RTIF, write a byte to TFLG2 with bit 6 set.
Refer to
Refer to
Always read 0
Address:
Reset:
Read:
Write:
9.7 Pulse
9.7 Pulse
$1025
Bit 7
TOF
Figure 9-22. Timer Interrupt Flag 2 Register (TFLG2)
0
= Unimplemented
RTIF
Accumulator.
Accumulator.
6
0
Timing System
PAOVF
5
0
PAIF
4
0
3
0
M68HC11E Family — Rev. 5
2
0
1
0
MOTOROLA
Bit 0
0

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