M29DW128F60NF1 STMICROELECTRONICS [STMicroelectronics], M29DW128F60NF1 Datasheet - Page 15

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M29DW128F60NF1

Manufacturer Part Number
M29DW128F60NF1
Description
128 Mbit (16Mb x8 or 8Mb x16, Multiple Bank, Page, Boot Block) 3V Supply, Flash Memory
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
M29DW128F
2.7
2.8
2.9
Write Enable (W)
The Write Enable pin, W, controls the Bus Write operation of the memory’s Command Interface.
V
The V
an external high voltage power supply to reduce the time required for Program operations. This
is achieved by bypassing the unlock cycles and/or using the multiple Word (2 or 4 at-a-time) or
multiple Byte Program (2, 4 or 8 at-a-time) commands.
The Write Protect function provides a hardware method of protecting the four outermost boot
blocks (two at the top, and two at the bottom of the address space). When V
Low, V
these blocks are ignored while V
When V
the four outermost boot blocks. Program and Erase operations can now modify the data in
these blocks unless the blocks are protected using Block Protection.
Applying V
(including the four outermost parameter blocks) using a High Voltage Block Protection
technique (In-System or Programmer technique). See
When V
mode. When V
Bypass Program operations the memory draws I
circuits. See the description of the Unlock Bypass command in the Command Interface section.
The transitions from V
Never raise V
memory may be left in an indeterminate state.
The V
unreliable. A 0.1µF capacitor should be connected between the V
V
must be sufficient to carry the currents required during Unlock Bypass Program, I
Reset/Block Temporary Unprotect (RP)
The Reset/Block Temporary Unprotect pin can be used to apply a Hardware Reset to the
memory or to temporarily unprotect all the blocks previously protected using a High Voltage
Block Protection technique (In-System or Programmer technique).
Note that if V
even if RP is at V
A Hardware Reset is achieved by holding Reset/Block Temporary Unprotect Low, V
least t
for Bus Read and Bus Write operations after t
Ready/Busy Output section,
and
SS
PP/
Figure 18
Ground pin to decouple the current surges from the power supply. The PCB track widths
PP
PP
PLPX
Write Protect (V
IL
, the memory protects the four outermost boot blocks; Program and Erase operations in
PP
PP
/Write Protect pin provides two functions. The V
/Write Protect pin must not be left floating or unconnected or the device may become
/Write Protect is High, V
/Write Protect is raised to V
. After Reset/Block Temporary Unprotect goes High, V
PPH
PP
PP
and
PP
to the V
/WP is at V
/Write Protect to V
/Write Protect returns to V
ID
.
Figure 19
IH
PP
to V
/WP pin will temporarily unprotect any block previously protected
IL
, then the four outermost parameter blocks will remain protected
PP
Table 30: Reset/Block Temporary Unprotect AC Characteristics
for more details.
PP
and from V
PP
/WP)
PP
IH
/Write Protect is Low, even when RP is at V
, the memory reverts to the previous protection status of
from any mode except Read mode, otherwise the
PP
the memory automatically enters the Unlock Bypass
PP
IH
to V
PHEL
or V
PP
IH
IL
or t
from the pin to supply the programming
must be slower than t
normal operation resumes. During Unlock
RHEL
Table 9: Hardware Protection
PP
function allows the memory to use
, whichever occurs last. See the
IH
PP
, the memory will be ready
/Write Protect pin and the
VHVPP
PP
2 Signal descriptions
/Write Protect is
ID
, see
.
PP
.
IL
for details.
Figure
, for at
15/93
20.

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