M29F032D70N1 STMICROELECTRONICS [STMicroelectronics], M29F032D70N1 Datasheet
M29F032D70N1
Related parts for M29F032D70N1
M29F032D70N1 Summary of contents
Page 1
FEATURES SUMMARY SUPPLY VOLTAGE – ±10% for PROGRAM, ERASE and CC READ OPERATIONS ACCESS TIME PROGRAMMING TIME – 10µs per Byte typical 64 UNIFORM 64Kbyte MEMORY BLOCKS PROGRAM/ERASE CONTROLLER – Embedded Byte Program algorithms ERASE ...
Page 2
M29F032D TABLE OF CONTENTS SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 3
STATUS REGISTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 4
M29F032D REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 5
SUMMARY DESCRIPTION The M29F032D Mbit (4Mb x8) non-volatile memory that can be read, erased and repro- grammed. These operations can be performed us- ing a single low voltage 5V supply. On power-up the memory defaults to its ...
Page 6
M29F032D Figure 3. TSOP Connections 6/35 A19 1 40 A18 A17 A16 A15 A14 A13 A12 M29F032D A11 A10 AI05260 A20 A21 W ...
Page 7
Figure 4. Block Addresses Note: Also see Appendix A, Table 16 for a full listing of the Block Addresses.. M29F032D Block Addresses 3FFFFFh 64 KByte 3F0000h 3EFFFFh 64 KByte 3E0000h 3DFFFFh 64 KByte 3D0000h 3CFFFFh 64 KByte Blocks 02FFFFh 64 ...
Page 8
M29F032D SIGNAL DESCRIPTIONS See Figure 2, Logic Diagram, and Table 1, Signal Names, for a brief overview of the signals connect this device. Address Inputs (A0-A21). The Address Inputs select the cells in the memory array to access ...
Page 9
BUS OPERATIONS There are five standard bus operations that control the device. These are Bus Read, Bus Write, Out- put Disable, Standby and Automatic Standby. See Tables 2, Bus Operations, for a summary. Typical- ly glitches of less than 5ns ...
Page 10
M29F032D COMMAND INTERFACE All Bus Write operations to the memory are inter- preted by the Command Interface. Commands consist of one or more sequential Bus Write oper- ations. Failure to observe a valid sequence of Bus Write operations will result ...
Page 11
Unlock Bypass Mode. Chip Erase Command. The Chip Erase com- mand can be used to erase the entire chip. Six Bus Write operations are required to issue the Chip Erase Command and start the Program/Erase ...
Page 12
M29F032D During Erase Suspend it is possible to Read and Program cells in blocks that are not being erased; both Read and Program operations behave as normal on these blocks. If any attempt is made to program in a protected ...
Page 13
Table 4. Program, Erase Times and Program, Erase Endurance Cycles Parameter Chip Erase Block Erase (64 Kbytes) Program (Byte) Chip Program (Byte by Byte) Program/Erase Cycles (per Block) Note 25° 5V STATUS REGISTER ...
Page 14
M29F032D Alternative Toggle Bit (DQ2). The Toggle Bit can be used to monitor the Program/ Erase controller during Erase operations. The Al- ternative Toggle Bit is output on DQ2 when the Status Register is read. During Chip Erase and Block ...
Page 15
Figure 5. Data Polling Flowchart START READ DQ5 & DQ7 at VALID ADDRESS DQ7 YES = DATA NO NO DQ5 = 1 YES READ DQ7 at VALID ADDRESS DQ7 YES = DATA NO FAIL Figure 6. Data Toggle Flowchart PASS ...
Page 16
M29F032D MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause per- manent damage to the device. Exposure to Abso- lute Maximum Rating conditions for extended periods may affect device reliability. These are ...
Page 17
DC AND AC PARAMETERS This section summarizes the operating measure- ment conditions, and the DC and AC characteris- tics of the device. The parameters in the DC and AC characteristics Tables that follow, are derived from tests performed under the ...
Page 18
M29F032D Table 9. DC Characteristics Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Supply Current (Read) CC1 I Supply Current (Standby) TTL CC2 I Supply Current (Standby) CMOS CC3 (1) Supply Current (Program/Erase) I CC4 ...
Page 19
Figure 9. Read AC Waveforms A0-A21 E G DQ0-DQ7 Table 10. Read AC Characteristics Symbol Alt t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid AVQV ACC (1) t Chip Enable Low ...
Page 20
M29F032D Figure 10. Write AC Waveforms, Write Enable Controlled A0-A21 DQ0-DQ7 V CC tVCHEL RB Table 11. Write AC Characteristics, Write Enable Controlled Symbol Alt t t Address Valid to Next Address Valid AVAV ...
Page 21
Figure 11. Write AC Waveforms, Chip Enable Controlled A0-A21 DQ0-DQ7 V CC tVCHWL RB Table 12. Write AC Characteristics, Chip Enable Controlled Symbol Alt t t Address Valid to Next Address Valid AVAV Write ...
Page 22
M29F032D Figure 12. Reset/Block Temporary Unprotect AC Waveforms tPLPX RP Table 13. Reset/Block Temporary Unprotect AC Characteristics Symbol Alt (1) t PHWL RP High to Write Enable Low, Chip Enable Low PHEL RH Output ...
Page 23
PACKAGE MECHANICAL TSOP40 – 40 lead Plastic Thin Small Outline 20mm, Package Outline TSOP-a Note: Drawing is not to scale. TSOP40 – 40 lead Plastic Thin Small Outline 20mm, Package Mechanical Data Symbol Typ A A1 ...
Page 24
M29F032D PART NUMBERING Table 14. Ordering Information Scheme Example: Device Type M29 Operating Voltage ± 10% CC Device Function 032D = 32 Mbit (x8), Uniform Block Speed Package N = TSOP40: ...
Page 25
APPENDIX A. BLOCK ADDRESS TABLE Table 16. Block Addresses, M29F032D Size, # Address Range KByte 63 64 3F0000h-3FFFFFh 62 64 3E0000h-3EFFFFh 61 64 3D0000h-3DFFFFh 60 64 3C0000h-3CFFFFh 59 64 3B0000h-3BFFFFh 58 64 3A0000h-3AFFFFh 57 64 390000h-39FFFFh 56 64 380000h-18FFFFh 55 ...
Page 26
M29F032D APPENDIX B. COMMON FLASH INTERFACE (CFI) The Common Flash Interface is a JEDEC ap- proved, standardized data structure that can be read from the Flash memory device. It allows a system software to query the device to determine various ...
Page 27
Table 19. CFI Query System Interface Information Address Data V Logic Supply Minimum Program/Erase voltage CC 1Bh 45h bit bit Logic Supply Maximum Program/Erase voltage CC 1Ch 55h bit bit ...
Page 28
M29F032D Table 20. Device Geometry Definition Address Data 27h 16h Device Size = 2 28h 00h Flash Device Interface Code description 29h 00h 2Ah 00h Maximum number of bytes in multi-byte program or page = 2 2Bh 00h Number of ...
Page 29
Table 21. Primary Algorithm-Specific Extended Query Table Address Data 40h 50h 41h 52h Primary Algorithm extended Query table unique ASCII string “PRI” 42h 49h 43h 31h Major version number, ASCII 44h 30h Minor version number, ASCII 45h 00h Address Sensitive ...
Page 30
M29F032D APPENDIX C. BLOCK PROTECTION Block protection can be used to prevent any oper- ation from modifying the data stored in the memo- ry. The blocks are protected in groups, refer to Appendix A, Table 16 for details of the ...
Page 31
Figure 13. Programmer Equipment Group Protect Flowchart Note: Block Protection Groups are shown in Appendix A, Table 16. START ADDRESS = GROUP ADDRESS ...
Page 32
M29F032D Figure 14. Programmer Equipment Chip Unprotect Flowchart NO = 1000 Note: Block Protection Groups are shown in Appendix A, Table 16. 32/35 START PROTECT ALL GROUPS CURRENT ...
Page 33
Figure 15. In-System Equipment Group Protect Flowchart Note: Block Protection Groups are shown in Appendix A, Table 16. START WRITE 60h ADDRESS = GROUP ADDRESS ...
Page 34
M29F032D Figure 16. In-System Equipment Chip Unprotect Flowchart ++ 1000 ISSUE READ/RESET COMMAND FAIL Note: Block Protection Groups are shown in Appendix A, Table 16. 34/35 START PROTECT ALL GROUPS CURRENT ...
Page 35
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. ...