ICS85322AMI ICST [Integrated Circuit Systems], ICS85322AMI Datasheet

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ICS85322AMI

Manufacturer Part Number
ICS85322AMI
Description
DUAL LVCMOS / LVTTL-TO-DIFFERENTIAL 2.5V / 3.3V LVPECL TRANSLATOR
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet
B
G
puts. The single ended clock input accepts LVCMOS or LVTTL
input levels and translate them to 2.5V / 3.3V LVPECL levels.
The small outline 8-pin SOIC package makes this device ideal
for applications where space, high performance and low power
are important.
85322AMI
HiPerClockS™
ICS
LOCK
ENERAL
D
The ICS85322I is a Dual LVCMOS / LVTTL-to-
Differential 2.5V / 3.3V LVPECL translator and a
member of the HiPerClocks™ family of High Per-
for mance Clocks Solutions from ICS. The
ICS85322I has selectable single ended clock in-
IAGRAM
CLK0
CLK1
Integrated
Circuit
Systems, Inc.
D
ESCRIPTION
Q0
nQ0
Q1
nQ1
www.icst.com/products/hiperclocks.html
1
F
P
D
2 differential 2.5V/3.3V LVPECL outputs
Selectable CLK0, CLK1 LVCMOS/LVTTL clock inputs
CLK0 and CLK1 can accepts the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 267MHz
Part-to-part skew: 250ps (maximum)
3.3V operating supply voltage
(operating range 3.135V to 3.465V)
2.5V operating supply voltage
(operating range 2.375V to 2.625V)
-40°C to 85°C ambient operating temperature
EATURES
IN
UAL
A
LVCMOS / LVTTL-
3.90mm x 4.92mm x 1.37mm body package
SSIGNMENT
2.5V / 3.3V LVPECL T
nQ0
nQ1
Q0
Q1
ICS85322I
8-Lead SOIC
M Package
Top View
1
2
3
4
8
7
6
5
V
CLK0
CLK1
V
EE
CC
TO
ICS85322I
-D
REV. B OCTOBER 7, 2003
IFFERENTIAL
RANSLATOR

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ICS85322AMI Summary of contents

Page 1

Integrated Circuit Systems, Inc ENERAL ESCRIPTION The ICS85322I is a Dual LVCMOS / LVTTL-to- ICS Differential 2.5V / 3.3V LVPECL translator and a HiPerClockS™ member of the HiPerClocks™ family of High Per- for mance Clocks Solutions from ICS. ...

Page 2

Integrated Circuit Systems, Inc ABLE IN ESCRIPTIONS ...

Page 3

Integrated Circuit Systems, Inc BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs Continuous Current 50mA Surge Current 100mA Package Thermal Impedance, JA Storage Temperature, T -65°C to 150°C STG ...

Page 4

Integrated Circuit Systems, Inc ABLE OWER UPPLY HARACTERISTICS ...

Page 5

Integrated Circuit Systems, Inc. P ARAMETER LVPECL V EE -1.3V ± 0.165V 3. UTPUT OAD EST IRCUIT nQx PART 1 Qx nQy PART sk( ART ...

Page 6

Integrated Circuit Systems, Inc. T 3.3V LVPECL O ERMINATION FOR The clock layout topology shown below is a typical termina- tion for LVPECL outputs. The two different layouts mentioned are recommended only as guidelines. FOUT and nFOUT are low impedance ...

Page 7

Integrated Circuit Systems, Inc. T 2.5V LVPECL O ERMINATION FOR Figure 2A and Figure 2B show examples of termination for 2.5V LVPECL driver. These terminations are equivalent to terminat- ing 2V. For V = 2.5V, the ...

Page 8

Integrated Circuit Systems, Inc. This section provides information on power dissipation and junction temperature for the ICS85322I. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS85322I is the sum of the core ...

Page 9

Integrated Circuit Systems, Inc. 3. Calculations and Equations. The purpose of this section is to derive the power dissipated into the load. LVPECL output driver circuit and termination are shown in Figure 3. F IGURE T o calculate worst case ...

Page 10

Integrated Circuit Systems, Inc ABLE VS IR LOW ABLE FOR JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in ...

Page 11

Integrated Circuit Systems, Inc ACKAGE UTLINE UFFIX FOR T ABLE Reference Document: JEDEC Publication 95, MS-012 85322AMI D LVCMOS / LVTTL- UAL 2.5V / 3.3V LVPECL T SOIC EAD ACKAGE ...

Page 12

Integrated Circuit Systems, Inc ABLE RDERING NFORMATION ...

Page 13

Integrated Circuit Systems, Inc ...

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