IS63LV1024L ISSI [Integrated Silicon Solution, Inc], IS63LV1024L Datasheet
IS63LV1024L
Available stocks
Related parts for IS63LV1024L
IS63LV1024L Summary of contents
Page 1
... When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 µW (typical) with CMOS input levels. The IS63LV1024L operates from a single 3.3V power supply and all inputs are TTL-compatible. DECODER MEMORY ARRAY I/O ...
Page 2
... IS63LV1024L PIN CONFIGURATION 32-Pin SOJ I/ I/ Vcc 8 25 GND PIN DESCRIPTIONS A0-A16 Address Inputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input ...
Page 3
... IS63LV1024L TRUTH TABLE Mode Not Selected X (Power-down) Output Disabled H Read H Write L ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Terminal Voltage with Respect to GND TERM T Temperature Under Bias BIAS T Storage Temperature STG P Power Dissipation T Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...
Page 4
... IS63LV1024L POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions = Max Vcc Operating Supply Current mA Max. OUT I TTL Standby V = Max Current (TTL Inputs Max IH I TTL Standby V = Max Current ...
Page 5
... IS63LV1024L READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time RC t Address Access Time AA t Output Hold Time OHA CE Access Time t ACE OE Access Time t DOE OE to Low-Z Output t (2) LZOE OE to High-Z Output t (2) HZOE CE to Low-Z Output t (2) LZCE CE to High-Z Output ...
Page 6
... IS63LV1024L AC WAVEFORMS (1,2) READ CYCLE NO. 1 ADDRESS D OUT PREVIOUS DATA VALID (1,3) READ CYCLE NO. 2 ADDRESS LZCE HIGH-Z D OUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE Address is valid prior to or coincident with CE LOW transitions OHA ...
Page 7
... IS63LV1024L WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End t SCE t Address Setup Time to AW Write End t Address Hold from HA Write End t Address Setup Time SA WE Pulse Width (OE High) t (1) PWE 1 WE Pulse Width (OE Low) t (2) PWE 2 t Data Setup to Write End ...
Page 8
... IS63LV1024L AC WAVEFORMS (1) (WE Controlled HIGH during Write Cycle) WRITE CYCLE NO. 2 ADDRESS OE CE LOW DATA UNDEFINED OUT D IN (WE Controlled LOW During Write Cycle) WRITE CYCLE NO. 3 ADDRESS OE LOW CE LOW DATA UNDEFINED OUT D IN Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write ...
Page 9
... IS63LV1024L-12T IS63LV1024L-12H IS63LV1024L-12J IS63LV1024L-12K IS63LV1024L-12B Industrial Range: –40°C to +85°C Speed (ns) Order Part No. 8 IS63LV1024L-8TI IS63LV1024L-8JI IS63LV1024L-8KI IS63LV1024L-8BI 10 IS63LV1024L-10TI IS63LV1024L-10HI IS63LV1024L-10JI IS63LV1024L-10KI IS63LV1024L-10BI 12 IS63LV1024L-12TI IS63LV1024L-12JI IS63LV1024L-12KI IS63LV1024L-12BI Integrated Silicon Solution, Inc. — www.issi.com — Rev. B 08/07/02 Package TSOP (Type II) STSOP (Type I) (8mm x13.4mm) ...