HEF4094BTS NXP [NXP Semiconductors], HEF4094BTS Datasheet

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HEF4094BTS

Manufacturer Part Number
HEF4094BTS
Description
8-stage shift-and-store bus register
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1. General description
2. Features
3. Ordering information
Table 1.
All types operate from 40 C to +125 C.
Type number
HEF4094BP
HEF4094BT
HEF4094BTS
Ordering information
Package
Name
DIP16
SO16
SSOP16
The HEF4094B is an 8-stage serial shift register. It has a storage latch associated with
each stage for strobing data from the serial input to parallel buffered 3-state outputs
QP0 to QP7. The parallel outputs may be connected directly to common bus lines. Data is
shifted on positive-going clock transitions. The data in each shift register stage is
transferred to the storage register when the strobe (STR) input is HIGH. Data in the
storage register appears at the outputs whenever the output enable (OE) signal is HIGH.
Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4094B
devices. Serial data is available at QS1 on positive-going clock edges to allow high-speed
operation in cascaded systems with a fast clock rise time. The same serial data is
available at QS2 on the next negative going clock edge. This is used for cascading
HEF4094B devices when the clock has a slow rise time.
It operates over a recommended V
(usually ground). Unused inputs must be connected to V
also suitable for use over the industrial ( 40 C to +85 C) and automotive ( 40 C to
+125 C) temperature ranges.
I
I
I
I
I
I
HEF4094B
8-stage shift-and-store bus register
Rev. 04 — 30 October 2008
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Operates across the automotive temperature range 40 C to +125 C
Complies with JEDEC standard JESD 13-B
ESD protection:
N
N
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Description
plastic dual in-line package; 16-leads (300 mil)
plastic small outline package; 16 leads; body width 3.9 mm
plastic shrink small outline package; 16 leads; body width 5.3 mm
DD
power supply range of 3 V to 15 V referenced to V
DD
, V
SS
, or another input. It is
Product data sheet
Version
SOT38-4
SOT109-1
SOT338-1
SS

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HEF4094BTS Summary of contents

Page 1

... Type number Package Name HEF4094BP DIP16 HEF4094BT SO16 HEF4094BTS SSOP16 power supply range referenced Description plastic dual in-line package; 16-leads (300 mil) plastic small outline package; 16 leads; body width 3.9 mm plastic shrink small outline package; 16 leads; body width 5.3 mm ...

Page 2

NXP Semiconductors 4. Functional diagram D 2 8-STAGE SHIFT CP REGISTER 3 STR 8-BIT STORAGE 1 REGISTER OE 15 3-STATE OUTPUTS QP0 QP1 QP2 QP3 QP4 QP5 QP6 QP7 Fig 1. Functional diagram STAGE 0 ...

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NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 4. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin STR QP0 to QP7 14, 13, 12 ...

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NXP Semiconductors [1] Table 3. Function table …continued Inputs CP OE STR H H [1] At the positive clock edge, the information in the 7th register stage is transferred to the 8th register stage and the QSn outputs ...

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NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage DD V input voltage I T ambient temperature amb t/ V input transition rise and fall rate 9. Static characteristics Table 6. Static characteristics ...

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NXP Semiconductors Table 6. Static characteristics unless otherwise specified Symbol Parameter Conditions I supply current all valid input DD combinations ...

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NXP Semiconductors Table 7. Dynamic characteristics for test circuit see SS amb Symbol Parameter t OFF-state to HIGH PZH propagation delay t OFF-state to LOW PZL propagation delay t HIGH to OFF-state ...

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NXP Semiconductors 11. Waveforms QPn, QS1 output QS2 output Measurement points are given in Logic levels: V and Fig 6. Clock to outputs propagation delays, and clock pulse width and maximum frequency Table 9. Measurement points Supply ...

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NXP Semiconductors OE input LOW-to-OFF OFF-to-LOW HIGH-to-OFF OFF-to-HIGH Measurement points are given in Logic levels: V and Fig 8. 3-state output enable and disable times for OE input QPn, QS1, QS2 output Measurement points are given in ...

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NXP Semiconductors Test data is given in Table Definitions for test circuit: DUT = Device Under Test load capacitance including jig and probe capacitance termination resistance should be equal to the output impedance Z T ...

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NXP Semiconductors 12. Application information Some examples of applications for the HEF4094B are: • Serial-to-parallel data conversion • Remote control holding register DIGITALLY CONTROLLED (REQUIRES CONTINUOUS DIGITAL CONTROL CONTROL AND SYNC CIRCUITRY data clock from remote control ...

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NXP Semiconductors 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. ...

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NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 ...

Page 14

NXP Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1.80 mm ...

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NXP Semiconductors 14. Abbreviations Table 11. Abbreviations Acronym Description DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 12. Revision history Document ID Release date HEF4094B_4 20081030 • Modifications: The format ...

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NXP Semiconductors 16. Legal information 16.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

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NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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