MC14094B_05 ONSEMI [ON Semiconductor], MC14094B_05 Datasheet

MC14094B_05

Manufacturer Part Number

MC14094B_05

Description

8−Stage Shift/Store Register with Three−State Outputs

Manufacturer

ONSEMI [ON Semiconductor]

Datasheet

1.MC14094B_05.pdf (10 pages)

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MC14094B

8−Stage Shift/Store Register

with Three−State Outputs

for each stage and a 3−state output from each latch.

seventh stage to two serial outputs. The Q

high−speed cascaded systems. The Q

following negative clock transition for use in low−speed cascaded

systems.

transition of the strobe input. Data propagates through the latch while

strobe is high.

which are placed in the high−impedance state by a logic Low on

Output Enable.

Features

•

1. Temperature Derating:

static voltages or electric fields. However, precautions must be taken to avoid

applications of any voltage higher than maximum rated voltages to this

high−impedance circuit. For proper operation, V

to the range V

(e.g., either V

MAXIMUM RATINGS

August, 2005 − Rev. 6

Symbol

The MC14094B combines an 8−stage shift register with a data latch

Data is shifted on the positive clock transition and is shifted from the

Data from each stage of the shift register is latched on the negative

Outputs of the eight data latches are controlled by 3−state buffers

This device contains protection circuitry to guard against damage due to high

Unused inputs must always be tied to an appropriate logic voltage level

Schottky TTL Load Over the Rated Temperature Range

Negative Clock Transitions

3−State Outputs

Capable of Driving Two Low−Power TTL Loads or One Low−Power

Input Diode Protection

Data Latch

Dual Outputs for Data Out on Both Positive and

Useful for Serial−to−Parallel Data Conversion

Pin−for−Pin Compatible with CD4094B

Pb−Free Packages are Available*

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C

, V

, I

stg

out

DC Supply Voltage Range

Input or Output Voltage Range

Input or Output Current

Power Dissipation, per Package

Ambient Temperature Range

Storage Temperature Range

Lead Temperature

(DC or Transient)

(DC or Transient) per Pin

(Note 1)

(8−Second Soldering)

or V

v (V

). Unused outputs must be left open.

Parameter

or V

(Voltages Referenced to V

out

) v V

output data is shifted on the

and V

−0.5 to V

output data is for use in

−0.5 to +18.0

−55 to +125

−65 to +150

out

)

Value

± 10

500

260

should be constrained

+ 0.5

Unit

°C

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

*For additional information on our Pb−Free strategy

and soldering details, please download the

ON Semiconductor Soldering and Mounting

Techniques Reference Manual, SOLDERRM/D.

ORDERING INFORMATION

WL, L

YY, Y

WW, W

http://onsemi.com

CASE 751B

CASE 948F

SOEIAJ−16

TSSOP−16

DT SUFFIX

CASE 648

CASE 966

P SUFFIX

D SUFFIX

F SUFFIX

PDIP−16

SOIC−16

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Indicator

Publication Order Number:

DIAGRAMS

MARKING

MC14094BCP

AWLYYWWG

MC14094B

AWLYWW

MC14094B/D

14094BG

ALYWG

ALYW

094B

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MC14094B_05 Summary of contents

Page 1

MC14094B 8−Stage Shift/Store Register with Three−State Outputs The MC14094B combines an 8−stage shift register with a data latch for each stage and a 3−state output from each latch. Data is shifted on the positive clock transition and is shifted from ...

Page 2

Output Enable Clock High Impedance * At the positive clock edge, information in the 7th shift register stage is transferred to Q8 and Q ORDERING INFORMATION Device MC14094BCP MC14094BCPG MC14094BD MC14094BDG MC14094BDR2 ...

Page 3

ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...

Page 4

SWITCHING CHARACTERISTICS Î Î Î Î Î ...

Page 5

O.E. DATA ST CLOCK REGISTER STAGE 1 CLOCK 2 * SERIAL CLOCK DATA IN CLOCK REGISTER STAGE 2 OUTPUT ENABLE 3 REGISTER STAGE 3 4 REGISTER STAGE 4 5 REGISTER STAGE 5 6 REGISTER STAGE 6 7 ...

Page 6

WH CLOCK 50 DATA IN 1 STROBE OUTPUT 15 ENABLE t t PLH PHL 90% 90% Q1 ³ 10% 10 TLH THL PLH Q′ 10 ...

Page 7

0.25 (0.010) M −A− −T− SEATING PLANE 0.25 (0.010 MC14094B PACKAGE DIMENSIONS PDIP−16 ...

Page 8

K 16X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006 −V− C 0.10 (0.004) SEATING −T− PLANE D MC14094B PACKAGE DIMENSIONS TSSOP−16 DT SUFFIX PLASTIC TSSOP ...

Page 9

VIEW 0.10 (0.004) 0.13 (0.005) M MC14094B PACKAGE DIMENSIONS SOEIAJ−16 F SUFFIX PLASTIC EIAJ SOIC PACKAGE CASE 966−01 ISSUE ...

Page 10

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for ...

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