MC14099BFEL ONSEMI [ON Semiconductor], MC14099BFEL Datasheet
MC14099BFEL
Manufacturer Part Number
MC14099BFEL
Description
8−Bit Addressable Latches
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
1.MC14099BFEL.pdf
(8 pages)
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Part Number:
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MC14099B
8−Bit Addressable Latches
serial form when the appropriate latch is addressed (via address pins
A0, A1, A2) and write disable is in the low state. For the MC14099B
the input is a unidirectional write only port.
independently of the state of Write Disable, Write/Read or Chip
Enable.
Features
•
•
•
•
•
•
•
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
to the range V
(e.g., either V
*For additional information on our Pb−Free strategy and soldering details, please
MAXIMUM RATINGS
© Semiconductor Components Industries, LLC, 2005
August, 2005 − Rev. 6
Symbol
V
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
I
The MC14099B is an 8−bit addressable latch. Data is entered in
The data is presented in parallel at the output of the eight latches
A Master Reset capability is available on both parts.
in
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level
Schottky TTL Load over the Rated Temperature Range
in
Serial Data Input
Parallel Output
Master Reset
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low−power TTL Loads or One Low−Power
MC14099B pin for pin compatible with CD4099B
Pb−Free Packages are Available*
V
T
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
P
, V
, I
T
T
stg
DD
A
D
L
out
out
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation, per Package
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
SS
SS
(DC or Transient)
(DC or Transient) per Pin
(Note 1)
(8−Second Soldering)
or V
v (V
DD
in
). Unused outputs must be left open.
Parameter
or V
(Voltages Referenced to V
out
) v V
DD
.
in
and V
−0.5 to V
SS
−0.5 to +18.0
−55 to +125
−65 to +150
out
)
Value
± 10
500
260
should be constrained
DD
+ 0.5
1
Unit
mW
mA
°C
°C
°C
V
V
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
A
WL, L
YY, Y
WW, W
G
http://onsemi.com
DW SUFFIX
CASE 751G
SOEIAJ−16
CASE 648
CASE 966
P SUFFIX
F SUFFIX
PDIP−16
SOIC−16
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
Publication Order Number:
16
1
16
1
16
1
DIAGRAMS
MARKING
MC14099BCP
AWLYYWWG
AWLYYWW
MC14099B
MC14099B/D
14099BG
ALYWG
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MC14099BFEL Summary of contents
Page 1
MC14099B 8−Bit Addressable Latches The MC14099B is an 8−bit addressable latch. Data is entered in serial form when the appropriate latch is addressed (via address pins A0, A1, A2) and write disable is in the low state. For the MC14099B ...
Page 2
... ORDERING INFORMATION Device MC14099BCP MC14099BCPG MC14099BDW MC14099BDWG MC14099BDWR2 MC14099BDWR2G MC14099BFEL †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MC14099B WRITE DISABLE DATA ...
Page 3
ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...
Page 4
SWITCHING CHARACTERISTICS (Note 5) Î Î Î ...
Page 5
RESET 2 DATA 3 WRITE 4 DISABLE A0 5 ADDRESS A1 6 DECODER A2 7 (M.S.B.) TRUTH TABLE Write Addressed Unaddressed Disable Latch Latches Reset 0 0 Data 0 1 Data Reset *Q ...
Page 6
DATA OR 50% WRITE DISABLE t PLH 90% 50% OUTPUT Q 10% t TLH RESET 50% OUTPUT Q MC14099B SWITCHING WAVEFORMS PHL ADDRESS t THL WRITE DISABLE t w( DATA ...
Page 7
−T− 0.25 (0.010 16X 0. SEATING e PLANE 14X ...
Page 8
0.10 (0.004) 0.13 (0.005 Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice ...