MC74HC374ADW ONSEMI [ON Semiconductor], MC74HC374ADW Datasheet
MC74HC374ADW
Manufacturer Part Number
MC74HC374ADW
Description
Octal 3-State Non-Inverting D Flip-Flop
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
1.MC74HC374ADW.pdf
(8 pages)
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MC74HC374A
Octal 3-State Non-Inverting
D Flip-Flop
High–Performance Silicon–Gate CMOS
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
edge of the clock. The Output Enable input does not affect the states of
the flip–flops, but when Output Enable is high, the outputs are forced
to the high–impedance state; thus, data may be stored even when the
outputs are not enabled.
input pins on the opposite side of the package from the output. This
device is similar in function to the HC534A which has inverting
outputs.
March, 2000 – Rev. 8
The MC74HC374A is identical in pinout to the LS374. The device
Data meeting the setup time is clocked to the outputs with the rising
The HC374A is identical in function to the HC574A which has the
No. 7A
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
Chip Complexity: 266 FETs or 66.5 Equivalent Gates
Semiconductor Components Industries, LLC, 2000
OUTPUT ENABLE
INPUTS
DATA
CLOCK
X = don’t care
Z = high impedance
D0
D1
D2
D3
D4
D5
D6
D7
Output
Enable
H
L
L
L
3
4
7
8
13
14
17
18
11
1
FUNCTION TABLE
LOGIC DIAGRAM
Inputs
L,H,
Clock
X
D
H
X
X
L
No Change
Output
12
15
16
19
2
5
6
9
Q
H
Z
L
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
PIN 20 = V CC
PIN 10 = GND
NONINVERTING
OUTPUTS
1
20
MC74HC374AN
MC74HC374ADW
MC74HC374ADWR2
MC74HC374ADT
MC74HC374ADTR2
20
20
1
1
Device
1
OUTPUT
ENABLE
ORDERING INFORMATION
A
WL = Wafer Lot
YY = Year
WW = Work Week
GND
SOIC WIDE–20
Q0
Q1
PIN ASSIGNMENT
D0
D1
Q2
D2
D3
Q3
http://onsemi.com
DW SUFFIX
CASE 751D
= Assembly Location
CASE 948G
DT SUFFIX
TSSOP–20
1
2
3
4
5
6
7
8
9
10
CASE 738
N SUFFIX
PDIP–20
SOIC–WIDE
SOIC–WIDE
TSSOP–20
TSSOP–20
Publication Order Number:
Package
PDIP–20
20
19
18
17
16
15
14
13
12
11
20
20
1
1
MC74HC374A/D
MC74HC374AN
V CC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CLOCK
DIAGRAMS
MARKING
AWLYYWW
AWLYYWW
20
1
HC374A
1000 / Reel
2500 / Reel
1440 / Box
Shipping
38 / Rail
75 / Rail
ALYW
374A
HC
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MC74HC374ADW Summary of contents
Page 1
... NONINVERTING 12 OUTPUTS PIN PIN 10 = GND Output Q MC74HC374AN H L MC74HC374ADW No Change MC74HC374ADWR2 Z MC74HC374ADT MC74HC374ADTR2 1 http://onsemi.com MARKING DIAGRAMS 20 PDIP–20 MC74HC374AN N SUFFIX AWLYYWW CASE 738 1 20 SOIC WIDE–20 HC374A DW SUFFIX AWLYYWW CASE 751D TSSOP–20 ...
Page 2
MAXIMUM RATINGS* Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...
Page 3
DC ELECTRICAL CHARACTERISTICS Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...
Page 4
TIMING REQUIREMENTS ( pF, ...
Page 5
TEST POINT OUTPUT DEVICE UNDER TEST *Includes all probe and jig capacitance Figure Clock 1 Output Enable MC74HC374A TEST ...
Page 6
SEATING PLANE 0.25 (0.010 20X T 0. 18X MC74HC374A PACKAGE DIMENSIONS PDIP–20 N SUFFIX PLASTIC DIP PACKAGE CASE 738–03 ...
Page 7
K 20X REF 0.10 (0.004) M 0.15 (0.006 L PIN 1 IDENT 1 0.15 (0.006 –V– 0.100 (0.004) –T– SEATING PLANE MC74HC374A PACKAGE DIMENSIONS TSSOP–20 DT ...
Page 8
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