TDA7502013TR STMICROELECTRONICS [STMicroelectronics], TDA7502013TR Datasheet
TDA7502013TR
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TDA7502013TR Summary of contents
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... It contains a 24-bit 50 MIPS DSP core, several interfaces for control and data, plus a configurable PLL. Order codes Part numbers TDA7502 TDA7502013TR November 2006 In-car remote amplifier DSP LQFP44 (10x 10x 1.4mm) The computational power and the memory configuration make this device particularly suitable for in car equalisation ...
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Contents Contents 1 Block diagram and PIN description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical ...
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TDA7502 List of tables Table 1. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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TDA7502 1 Block diagram and PIN description Figure 1. Block diagram SDI0 LRCLKT SCKT LRCLKR SCKR SCL SDA SS SCK MISO MOSI GPIO3 GPIO4 GPIO5 DBCK/GPIO1 DBIN/GPIO2 Figure 2. Pin connection (Top view) SDI1 SDI2 SDO0 SDO1 SDO2 SERIAL AUDIO ...
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Block diagram and PIN description Table 1. Pin description N. Name 1 VDD1 2 GND1 3 INT 4 SCANEN 5 TESTEN 6 DBRQN 7 DBOUT/GPIO2 8 VDD2 9 GND2 10 DBCK/GPIO0 11 DBIN/GPIO1 12 CLKOUT 13 PGND 14 PVCC (1) ...
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TDA7502 Table 1. Pin description (continued) N. Name 23 LRCKR 24 SCKR 25 VDD4 26 GND4 27 SDO0 28 SDO1 29 SDO2 30 VDD5 31 GND5 32 LRCKT 33 SCKT 34 SCL 35 SDA 36 SCK MOSI ...
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Electrical specifications 2 Electrical specifications Table 2. Absolute maximum ratings Symbol V DC supply voltage dd V Digital input voltage (XTI and XTO only Digital input voltage in T Operating junction temperature range j T Storage temperature stg ...
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TDA7502 Table 7. Oscillator characteristics Symbol Parameter F Max oscillator frequency (XTI) osc Table 8. General interface electrical characteristics Symbol Parameter Low level input current without l il pullup device High level input current without l ih pullup device Tri-state ...
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Electrical specifications Figure 3. Maximum DSP clock frequency (F MHz MHz MHz 10/25 ) versus junction temperature (T dsp Vdd = 3.3V -40 25 Vdd = 3.15V -40 ...
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TDA7502 3 SAI interface Figure 4. SAI timings SDI0-3 LRCKR SCKR (RCKP=0) Table 11. Cycles Timing t Minimum Clock Cycle sckr t SCKR active edge to data out valid dt t LRCK setup time lrs t LRCK hold time lrh ...
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SAI interface Figure 6. SAI protocol when RLRS=1; RREL=0; RCKP=1; RDIR=1. LRCKR (#23) SCKR (#24) SDI0,1,2 (#20, #21, #22) Figure 7. SAI protocol when RLRS=0; RREL=0; RCKP=0; RDIR=0. LRCKR (#23) SCKR (#24) SDI0,1,2 (#20, #21, #22) Figure 8. SAI protocol ...
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TDA7502 4 SPI interfaces Table 12. SPI interfaces Symbol Master t Clock cycle sclk t Sclk edge to MOSI valid dtr t MISO setup time misosetup t MISO hold time misohold t SCK high time sclkh t SCK high low ...
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SPI interfaces Table 13. Debug port interface No. 1 DBCK rise time 2 DBCK fall time 3 DBCK low 4 DBCK high 5 DBCK cycle time 6 DBRQN asserted to DBOUT (ACK) asserted 7 DBCK high to DBOUT valid 8 ...
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TDA7502 Figure 12. Debug port data I/O to status timing. DBCK (input) DBOUT (output) DBIN (input) Figure 13. Debug port read timing. DBCK (input) DBOUT (output) Note: 1 High Impedance, external pull-down resistor Figure 14. Debug port DBCK next command ...
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I2C timing timing Figure 15. Definition of timing for the I SDA t BUF t LOW SCL t t HD:STA R Table 14. Definitions Symbol Parameter F SCLl clock frequency SCL Bus free between a STOP ...
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TDA7502 6 Functional description The TDA7502 contains one DSP core and associated peripherals. 6.1 24-BIT DSP core. The DSP core is used to process the converted analog audio data coming from the CODEC chip via the SAI and return it ...
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Functional description 6.2 DSP peripherals There are a number of peripherals that are tightly coupled to the DSP Core. Each of the peripherals are listed below and described in the following sections. ● 1024 x 24-Bit X-RAM. ● 1024 x ...
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TDA7502 Essentially this consists of a routine that is called when the DSP comes out of reset. There are four different boot modes supported by the boot ROM. The first mode loads the application program via SPI interface where Casper’s ...
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Functional description Every component hooked up to the I memory or some other complex function chip. Each of these chips can act as a receiver and /or transmitter on its functionality. 6.3.8 General purpose input/output The DSP requires a set ...
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TDA7502 7 Application scheme Figure 16. Application schematic for TDA7502 Application scheme SCKT LRCKT GND5 VDD5 SDO2 SDO1 SDO0 GND4 VDD4 SCKR LRCKR SDI2 SDI1 SDI0 21/25 ...
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Application scheme Figure 17. Block diagram of car amplifier audio sub-system. DIGITAL AUDIO 22/25 To Microprocessor EPROM (64Kx8) Control Bus TDA7502 TDA7535 D99AU1036 TDA7502 POWER AMPLIFIER ...
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TDA7502 8 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner ...
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Revision history 9 Revision history Table 16. Revision history Date January 2004 September 2004 March 2005 24-Nov-2006 24/25 Revision Description of changes 8 First Issue in EDOCS dms. Changed the style-sheet look. 9 Cancelled the “Package Marking” information. 10 Changed ...
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TDA7502 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at ...