74LVT2245WM_08 FAIRCHILD [Fairchild Semiconductor], 74LVT2245WM_08 Datasheet

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74LVT2245WM_08

Manufacturer Part Number
74LVT2245WM_08
Description
Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs and 25 B Port Outputs
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
©1999 Fairchild Semiconductor Corporation
74LVT2245, 74LVTH2245 Rev. 1.5.0
74LVT2245, 74LVTH2245
Low Voltage Octal Bidirectional Transceiver with
3-STATE Inputs/Outputs and 25
B Port Outputs
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
74LVT2245WM
74LVT2245SJ
74LVT2245MTC
74LVTH2245WM
74LVTH2245SJ
74LVTH2245MTC
Order Number
Input and output interface capability to systems at
5V V
Equivalent 25 series resistor on B Port outputs
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH2245),
also available without bushold feature (74LVT2245)
Live insertion/extraction permitted
Power Up/Down high impedance provides glitch-free
bus loading
Outputs source/sink –12mA/+12mA on B Port,
–32mA/+64mA on A Port
Latch-up performance exceeds 500mA
ESD performance:
– Human-body model
– Machine model
– Charged-device model
All packages are lead free per JEDEC: J-STD-020B standard.
CC
Package
Number
200V
MTC20
MTC20
M20B
M20D
M20B
M20D
2000V
1000V
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
General Description
The LVT2245 and LVTH2245 contain eight non-inverting
bidirectional buffers with 3-STATE outputs and are
intended for bus-oriented applications. The Transmit/
Receive (T/R) input determines the direction of data flow
through the bidirectional transceiver. Transmit (active-
HIGH) enables data from A Ports to B Ports; Receive
(active-LOW) enables data from B Ports to A Ports. The
Output Enable input, when HIGH, disables both A and B
Ports by placing them in a high impedance state. The
equivalent 25 -series resistor in the B Port helps reduce
output overshoot and undershoot.
The LVTH2245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These transceivers are designed for low voltage (3.3V)
V
interface to a 5V environment. The LVT2245 and
LVTH2245 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
CC
Package Description
applications, but with the capability to provide a TTL
Series Resistors in the
January 2008
www.fairchildsemi.com

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74LVT2245WM_08 Summary of contents

Page 1

Low Voltage Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs and 25 B Port Outputs Features Input and output interface capability to systems Equivalent 25 series resistor on B Port outputs Bushold data inputs eliminate the ...

Page 2

Connection Diagram Pin Description Pin Description Names OE Output Enable Input T/R Transmit/Receive Input A –A Side A Inputs or 3-STATE Outputs –B Side B Inputs or 3-STATE Outputs 0 7 ©1999 Fairchild Semiconductor Corporation 74LVT2245, 74LVTH2245 ...

Page 3

Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure ...

Page 4

DC Electrical Characteristics Symbol Parameter V Input Clamp Diode Voltage IK V Input HIGH Voltage IH V Input LOW Voltage IL V Output HIGH Voltage A Port OH V Output LOW Voltage A Port OL (2) I Bushold Input Minimum ...

Page 5

Dynamic Switching Characteristics Symbol Parameter V Quiet Output Maximum OLP Dynamic Quiet Output Minimum OLV Dynamic V OL Notes: 6. Characterized in SOIC package. Guaranteed parameter, but not tested. 7. Max number of outputs defined as (n). ...

Page 6

Physical Dimensions 20 B 10.65 7.60 10.00 7.40 1 0.51 PIN ONE 0.35 INDICATOR 2.65 MAX 0.75 0.25 (R0.10) (R0.10) 8° 0° 1.27 0.40 SEATING PLANE (1.40) DETAIL A SCALE: 2:1 Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC ...

Page 7

Physical Dimensions (Continued) Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or ...

Page 8

Physical Dimensions (Continued) Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision ...

Page 9

TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ ...

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