ADC121C021CIMKX NSC [National Semiconductor], ADC121C021CIMKX Datasheet
ADC121C021CIMKX
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ADC121C021CIMKX Summary of contents
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ADC121C021/ADC121C027 2 I C-Compatible, 12-Bit Analog-to-Digital Converter (ADC) with Alert Function General Description The ADC121C021 is a low-power, monolithic, 12-bit, analog- to-digital converter(ADC) that operates from a +2.7 to 5.5V supply. The converter is based on a successive approxima- tion ...
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... Ordering Information Order Code ADC121C021CIMK ADC121C021CIMKX ADC121C027CIMK ADC121C027CIMKX Shipped with the ADC121C021. ADC121C021EB Block Diagram www.national.com Option Alert pin Alert pin TSOT-6 Tape-and-Reel Address pin Address pin TSOT-6 Tape-and-Reel Also compatible with the Evaluation Board ADC121C027 option. Please order samples. 2 Package ...
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Pin Descriptions Symbol Type V Supply A GND Ground V Analog Input IN ALERT Digital Output SCL Digital Input Digital SDA Input/Output Digital Input, ADDR three levels Package Pinouts V A ADC121C021 1 TSOT-6 ADC121C027 1 TSOT-6 Equivalent Circuit Power ...
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Absolute Maximum Ratings (Notes Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Voltage on any Analog Input Pin to GND Voltage on any Digital ...
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Symbol Parameter SFDR Spurious-Free Dynamic Range Intermodulation Distortion, Second Order Terms (IMD ) 2 IMD Intermodulation Distortion, Third Order Terms (IMD ) 3 FPBW Full Power Bandwidth (−3dB) ANALOG INPUT CHARACTERISTICS V Input Range Leakage Current (Note ...
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Symbol Parameter POWER REQUIREMENTS Supply Voltage Minimum V A Supply Voltage Maximum Continuous Operation Mode -- 2-wire interface active. I Supply Current N P Power Consumption N Automatic Conversion Mode -- 2-wire interface stopped and quiet (SCL = SDA = ...
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A.C. and Timing Characteristics The following specifications apply for 25°C, unless otherwise specified. A Symbol Parameter CONVERSION RATE Conversion Time f Conversion Rate CONV DIGITAL TIMING SPECS (SCL, SDA) f Serial Clock Frequency SCL t SCL Low ...
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Symbol Parameter t Rise time of SDA signal rDA t Fall time of SDA signal fDA t Rise time of SCL signal rCL Rise time of SCL signal after a t repeated start condition and after an rCL1 acknowledge bit. ...
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Note 7: The inputs are protected as shown below. Input voltage magnitudes up to 5.5V, regardless of V example 3V, the digital input pins can be driven with a 5V logic device. A Note 8: To guarantee ...
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Specification Definitions ACQUISITION TIME is the time required for the ADC to ac- quire the input voltage. During this time, the hold capacitor is charged by the input voltage. APERTURE DELAY is the time between the start of a con- ...
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Typical Performance Characteristics +25°C, unless otherwise stated. INL vs. Code - V A INL vs. Code - V A INL vs. Supply f = 400kHz, f SCL =3V 30020922 =5V 30020924 30020926 11 = 22kSPS 1kHz ...
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ENOB vs. Supply FFT Plot Offset Error vs. Temperature www.national.com SINAD vs. Supply 30020928 30020930 Gain Error vs. Temperature 30020932 12 30020929 FFT Plot 30020931 30020933 ...
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Continuous Operation Supply Current vs. V Power Down (PD ) Supply Current vs Automatic Conversion Supply Current vs 30020934 A 30020936 13 A 30020935 www.national.com ...
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Functional Description The ADC121C021 is a successive-approximation analog-to- digital converter designed around a charge-redistribution dig- ital-to-analog converter. Unless otherwise stated, references to the ADC121C021 in this section will apply to both the ADC121C021 and the ADC121C027. 1.1 CONVERTER OPERATION ...
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ADC TRANSFER FUNCTION The output format of the ADC121C021 is straight binary. Code transitions occur midway between successive integer LSB values. The LSB width for the ADC121C021 is V The ideal transfer characteristic is shown in Figure 5. The ...
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INTERNAL REGISTERS The ADC121C021 is equipped with 8 internal data registers and one address pointer register. The registers provide addi- tional ADC functions such as storing minimum and maximum conversion results, setting alert threshold levels, and storing data to ...
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Bits Name Description 15 Alert Flag When the Alert Bit Enable is set in the Configuration Register, this bit will be high if either alert flag is set in the Alert Status Register. Otherwise, this bit is a zero. This ...
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Bits Name Description 7:5 Cycle Time Configures Automatic Conversion mode. When these bits are set to zeros, the automatic conversion mode is disabled. This is the case at power-up. When these bits are set to a non-zero value, the ADC ...
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V -- Alert Hysteresis Register HYST Pointer Address 05h (Read/Write) Default Value: 0000h D15 D14 D13 Reserved Bits Name Description 15:12 Reserved Always reads zeros. Zeros must be written to these bits. 11:0 Hysteresis Sets the ...
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SERIAL INTERFACE The I 2 C-compatible interface operates in all three speed modes. Standard mode (100kHz) and Fast mode (400kHz) are functionally the same and will be referred to as Standard- Fast mode in this document. High-Speed mode (3.4MHz) ...
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Master sends a NACK to the ADC and generates a Stop condition to end communication after receiving 8-bits of data. For a 2-Byte read operation, the Master continues the transmission by sending an ACK to ...
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ALERT FUNCTION The ALERT function is an "out-of-range" indicator. At the end of every conversion, the measured voltage is compared to the values in the V and V registers. If the measured volt- HIGH LOW age exceeds the value ...
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COMMUNICATING WITH THE ADC121C021 The ADC121C021's data registers are selected by the ad- dress pointer (see Section 1.6.1). To read/write a specific data register, the pointer must be set to that register's address. The pointer is always written at ...
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Reading from a 1-Byte ADC Register FIGURE 13. (a) Typical Read from a 1-Byte ADC Register with Preset Pointer FIGURE 14. (b) Typical Pointer Set Followed by Immediate Read of a 1-Byte ADC Register www.national.com 24 30020971 30020972 ...
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Writing to an ADC Register FIGURE 15. (a) Typical Write to a 1-Byte ADC Register FIGURE 16. (b) Typical Write to a 2-Byte ADC Register 25 30020964 30020973 www.national.com ...
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QUIET INTERFACE MODE To improve performance at High Speed, operate the ADC in Quiet Interface Mode. This mode provides improved INL and DNL performance Hs-Mode (3.4MHz). The Quiet Inter- face mode provides a maximum throughput ...
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Applications Information 2.1 TYPICAL APPLICATION CIRCUIT A typical application circuit is shown in Figure 18. The analog supply is bypassed with a capacitor network located close to the ADC121C021. The ADC uses the analog supply (V its reference voltage, ...
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INTELLIGENT BATTERY MONITOR The ADC121C021 is easily used as an intelligent battery monitor. The simple circuit shown in Figure 20, uses the ADC121C021, the LP2980 fixed reference, and a resistor di- vider to implement an intelligent battery monitor with ...
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Physical Dimensions inches (millimeters) unless otherwise noted Order Numbers ADC121C021CIMK & ADC121C027CIMK 6-Lead TSOT NS Package Number MK06A 29 www.national.com ...
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