MC14071BDTG

Manufacturer Part NumberMC14071BDTG
DescriptionIC GATE OR QUAD 2INPUT 14-TSSOP
ManufacturerON Semiconductor
Series4000B
MC14071BDTG datasheet
 


Specifications of MC14071BDTG

Logic TypeOR GateNumber Of Inputs2
Number Of Circuits4Current - Output High, Low3.4mA, 3.4mA
Voltage - Supply3 V ~ 18 VOperating Temperature-55°C ~ 125°C
Mounting TypeSurface MountPackage / Case14-TSSOP
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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MC14001B Series
B-Suffix Series CMOS Gates
MC14001B, MC14011B, MC14023B,
MC14025B, MC14071B, MC14073B,
MC14081B, MC14082B
The B Series logic gates are constructed with P and N channel
enhancement mode devices in a single monolithic structure
(Complementary MOS). Their primary use is where low power
dissipation and/or high noise immunity is desired.
Features
Supply Voltage Range = 3.0 Vdc to 18 Vdc
All Outputs Buffered
Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range.
Double Diode Protection on All Inputs Except: Triple Diode
Protection on MC14011B and MC14081B
Pin−for−Pin Replacements for Corresponding CD4000 Series
B Suffix Devices
Pb−Free Packages are Available
MAXIMUM RATINGS
(Voltages Referenced to V
Symbol
Parameter
V
DC Supply Voltage Range
DD
V
, V
Input or Output Voltage Range
in
out
(DC or Transient)
I
, I
Input or Output Current
in
out
(DC or Transient) per Pin
P
Power Dissipation, per Package
D
(Note 1)
T
Ambient Temperature Range
A
T
Storage Temperature Range
stg
T
Lead Temperature
L
(8−Second Soldering)
V
ESD Withstand Voltage
ESD
Human Body Model
Machine Model
Charged Device Model
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
to the range V
v (V
or V
) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
or V
). Unused outputs must be left open.
SS
DD
© Semiconductor Components Industries, LLC, 2010
September, 2010 − Rev. 7
)
SS
Value
Unit
−0.5 to +18.0
V
−0.5 to V
+ 0.5
V
DD
± 10
mA
500
mW
−55 to +125
°C
−65 to +150
°C
260
°C
V
> 3000
> 300
N/A
MC14001B
MC14011B
MC14023B
MC14025B
MC14071B
MC14073B
MC14081B
and V
should be constrained
in
out
MC14082B
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
1
http://onsemi.com
MARKING
DIAGRAMS
14
PDIP−14
MC140xxBCP
P SUFFIX
AWLYYWWG
CASE 646
1
14
SOIC−14
140xxBG
D SUFFIX
AWLYWW
CASE 751A
1
14
14
TSSOP−14
0xxB
DT SUFFIX
ALYWG
CASE 948G
G
1
14
SOEIAJ−14
MC140xxB
F SUFFIX
ALYWG
CASE 965
1
xx
= Specific Device Code
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W
= Work Week
G or G
= Pb−Free Package
(Note: Microdot may be in either location)
DEVICE INFORMATION
Device
Description
Quad 2−Input NOR Gate
Quad 2−Input NAND Gate
Triple 3−Input NAND Gate
Triple 3−Input NOR Gate
Quad 2−Input OR Gate
Triple 3−Input AND Gate
Quad 2−Input AND Gate
Dual 4−Input AND Gate
ORDERING INFORMATION
Publication Order Number:
MC14001B/D

MC14071BDTG Summary of contents

  • Page 1

    MC14001B Series B-Suffix Series CMOS Gates MC14001B, MC14011B, MC14023B, MC14025B, MC14071B, MC14073B, MC14081B, MC14082B The B Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is ...

  • Page 2

    NOR MC14001B Quad 2−Input NOR Gate Quad 2−Input NAND Gate MC14025B Triple 3−Input NOR Gate Triple 3−Input NAND Gate 1 ...

  • Page 3

    ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...

  • Page 4

    SWITCHING CHARACTERISTICS Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

  • Page 5

    MC14001B, MC14071B One of Four Gates Shown *Inverter omitted in MC14001B MC14023B, MC14073B One of Three Gates Shown ...

  • Page 6

    TYPICAL B−SERIES GATE CHARACTERISTICS N−CHANNEL DRAIN CURRENT (SINK) 5.0 4.0 3.0 2.0 1 1.0 2.0 3 DRAIN-TO-SOURCE VOLTAGE (Vdc) DS Figure 5.0 Vdc 8.0 6.0 4.0 ...

  • Page 7

    TYPICAL B−SERIES GATE CHARACTERISTICS (cont’d) VOLTAGE TRANSFER CHARACTERISTICS SINGLE INPUT NAND, AND MULTIPLE INPUT NOR, OR 5.0 4.0 SINGLE INPUT NOR, OR 3.0 MULTIPLE INPUT NAND, AND 2.0 1 1.0 2.0 3.0 4.0 5 INPUT VOLTAGE ...

  • Page 8

    ORDERING INFORMATION Device MC14001BCP MC14001BCPG MC14001BD MC14001BDG MC14001BDR2 MC14001BDR2G MC14001BDTR2 MC14001BDTR2G MC14001BFEL MC14001BFELG MC14011BCP MC14011BCPG MC14011BD MC14011BDG MC14011BDR2 MC14011BDR2G MC14011BDTR2 MC14011BDTR2G MC14011BF MC14011BFG MC14011BFEL MC14011BFELG MC14023BCP MC14023BCPG MC14023BD MC14023BDG MC14023BDR2 MC14023BDR2G MC14023BFEL MC14023BFELG Package PDIP−14 PDIP−14 (Pb−Free) SOIC−14 SOIC−14 (Pb−Free) ...

  • Page 9

    ... ORDERING INFORMATION Device MC14025BCP MC14025BCPG MC14025BD MC14025BDG MC14025BDR2 MC14025BDR2G MC14025BFEL MC14025BFELG MC14071BCP MC14071BCPG MC14071BD MC14071BDG MC14071BDR2 MC14071BDR2G MC14071BDT MC14071BDTG MC14071BDTR2 MC14071BDTR2G MC14071BFEL MC14071BFELG MC14073BCP MC14073BCPG MC14073BD MC14073BDG MC14073BDR2 MC14073BDR2G MC14073BFEL MC14073BFELG Package PDIP−14 PDIP−14 (Pb−Free) SOIC−14 SOIC−14 (Pb− ...

  • Page 10

    ORDERING INFORMATION Device MC14081BCP MC14081BCPG MC14081BD MC14081BDG MC14081BDR2 MC14081BDR2G MC14081BDTR2 MC14081BDTR2G MC14081BFEL MC14081BFELG MC14082BCP MC14082BCPG MC14082BD MC14082BDG MC14082BDR2 MC14082BDR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging ...

  • Page 11

    −T− SEATING PLANE 0.13 (0.005) PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...

  • Page 12

    ... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...

  • Page 13

    ... S A −V− C 0.10 (0.004) −T− G SEATING D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...

  • Page 14

    ... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...