PCA9540BGD NXP [NXP Semiconductors], PCA9540BGD Datasheet

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PCA9540BGD

Manufacturer Part Number
PCA9540BGD
Description
2-channel I2C-bus multiplexer
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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1. General description
2. Features
The PCA9540B is a 1-of-2 bidirectional translating multiplexer, controlled via the I
The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.
Only one SCx/SDx channel is selected at a time, determined by the contents of the
programmable control register.
A power-on reset function puts the registers in their default state and initializes the I
state machine with no channels selected.
The pass gates of the multiplexer are constructed such that the V
limit the maximum high voltage that will be passed by the PCA9540B. This allows the use
of different bus voltages on each SCx/SDx pair, so that 1.8 V, 2.5 V or 3.3 V parts can
communicate with 5 V parts without any additional protection. External pull-up resistors
can pull the bus up to the desired voltage level for this channel. All I/O pins are 5 V
tolerant.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
PCA9540B
2-channel I
Rev. 04 — 3 September 2009
1-of-2 bidirectional translating multiplexer
I
Channel selection via I
Power up with all multiplexer channels deselected
Low R
Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
No glitch on power-up
Supports hot insertion
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant inputs
0 Hz to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD2-A115
and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Packages offered: SO8, TSSOP8, XSON8U
2
C-bus interface logic; compatible with SMBus standards
on
switches
2
C-bus multiplexer
2
C-bus
DD
Product data sheet
pin can be used to
2
2
C-bus.
C-bus

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PCA9540BGD Summary of contents

Page 1

PCA9540B 2-channel I Rev. 04 — 3 September 2009 1. General description The PCA9540B is a 1-of-2 bidirectional translating multiplexer, controlled via the I The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels. Only one SCx/SDx ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information +85 C amb Type number Topside Package mark Name PCA9540BD PA9540B SO8 PCA9540BDP 9540B TSSOP8 PCA9540BGD 40B XSON8U 4. Block diagram SD0 SD1 SC0 SC1 SCL SDA Fig 1. PCA9540B_4 Product data sheet Description plastic small outline package ...

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... SD1 PCA9540BD SD0 4 5 SC0 002aae713 Pin configuration for SO8 SCL 1 SDA 2 PCA9540BGD SD0 4 Transparent top view Pin configuration for XSON8U Pin description Pin Description 1 serial clock line 2 serial data line 3 supply voltage 4 serial data 0 ...

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NXP Semiconductors 6. Functional description Refer to 6.1 Device addressing Following a START condition the bus master must output the address of the slave it is accessing. The address of the PCA9540B is shown in Fig 5. The last bit ...

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NXP Semiconductors Table 6.3 Power-on reset When power is applied reset condition until V and the PCA9540B registers and I states (all zeroes), causing all the channels to be deselected. ...

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NXP Semiconductors Figure 7, we see that V 3 lower so the PCA9540B supply voltage could be set to 3.3 V. Pull-up resistors can then be used to bring the bus voltages to their appropriate levels (see More ...

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NXP Semiconductors 7.3 System configuration A device generating a message is a ‘transmitter’, a device receiving is the ‘receiver’. The device that controls the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’ ...

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NXP Semiconductors 7.5 Bus transactions SDA START condition Fig 12. Write control register SDA START condition Fig 13. Read control register 8. Application design-in information Fig 14. Typical application PCA9540B_4 Product data sheet slave address ...

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NXP Semiconductors 9. Limiting values Table 4. In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to ground (V Symbol tot T stg ...

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NXP Semiconductors 10. Static characteristics Table 5. Static characteristics +85 C; unless otherwise specified. SS amb See Table 6 for Symbol ...

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NXP Semiconductors Table 6. Static characteristics +85 C; unless otherwise specified. SS amb See Table 5 for Symbol Parameter Supply V ...

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NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics Symbol Parameter t propagation delay PD f SCL clock frequency SCL t bus free time between a STOP and BUF START condition t hold time (repeated) START HD;STA condition t LOW ...

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NXP Semiconductors SDA t BUF t LOW SCL t HD;STA P S Fig 15. Definition of timing on the I PCA9540B_4 Product data sheet HD;DAT HIGH SU;DAT 2 C-bus Rev. 04 — 3 ...

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NXP Semiconductors 12. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT ...

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NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 ...

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NXP Semiconductors XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 0.5 mm terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT A ...

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NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 13.1 Introduction ...

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NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including ...

Page 19

NXP Semiconductors Fig 19. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 14. Abbreviations Table 10. Acronym CDM ESD HBM 2 I C-bus I/O ...

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NXP Semiconductors 15. Revision history Table 11. Revision history Document ID Release date PCA9540B_4 20090903 • Modifications: Added XSON8U package offering (affects information”, PCA9540B_3 20090528 PCA9540B_2 20040929 (9397 750 13731) PCA9540B_1 20040413 (9397 750 12918) PCA9540B_4 Product data sheet Data ...

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NXP Semiconductors 16. Legal information 16.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

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NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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