X9241MP XICOR [Xicor Inc.], X9241MP Datasheet

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X9241MP

Manufacturer Part Number
X9241MP
Description
Manufacturer
XICOR [Xicor Inc.]
Datasheet
Terminal Voltage 5V, 64 Taps
© Xicor, Inc. 1994, 1995, 1996 Patents Pending
3864-2.7 7/1/96 T0/C3/D3 NS
X9241
FEATURES
FUNCTIONAL DIAGRAM
A
AN20 • AN42–48 • AN50–53 • AN73 • XK9241
Four E
Two-Wire Serial Interface
Register Oriented Format
—Directly Write Wiper Position
—Read Wiper Position
—Store as Many as Four Positions per Pot
Instruction Format
—Quick Transfer of Register Contents to
—Cascade Resistor Arrays
Low Power CMOS
Direct Write Cell
—Endurance - 100,000 Data Changes per Register
—Register Data Retention - 100 years
16 Bytes of E
3 Resistor Array Values
—2K to 50K Mask Programmable
—Cascadable For Values of 500 to 200K
Resolution: 64 Taps each Pot
20-Lead Plastic DIP, 20-Lead TSSOP and
20-Lead SOIC Packages
PPLICATION
SDA
SCL
Resistor Array
A0
A1
A2
A3
2
A V A I L A B L E
POTs in One Package
INTERFACE
CIRCUITRY
CONTROL
N
OTES AND
AND
2
PROM memory
Quad E
D
EVELOPMENT
DATA
8
2
POT
S
YSTEM
R0 R1
R2 R3
R0 R1
R2 R3
Nonvolatile Digital Potentiometer
REGISTER
REGISTER
COUNTER
COUNTER
WIPER
WIPER
(WCR)
(WCR)
X9241
RESISTOR
ARRAY
POT 1
1
DESCRIPTION
The X9241 integrates four nonvolatile E
controlled potentiometers on a monolithic CMOS micro-
circuit.
The X9241 contains four resistor arrays, each com-
posed of 63 resistive elements. Between each element
and at either end are tap points accessible to the wiper
elements. The position of the wiper element on the array
is controlled by the user through the two-wire serial bus
interface.
Each resistor array has associated with it a wiper counter
register and four 8-bit data registers that can be directly
written and read by the user. The contents of the wiper
counter register control the position of the wiper on the
resistor array.
The data register may be read or written by the user. The
contents of the data registers can be transferred to the
wiper counter register to position the wiper. The current
wiper position can be transferred to any one of its
associated data registers.
The arrays may be cascaded to form resistive elements
with 127, 190 or 253 taps.
VL0
VW0
VH0
VH1
VL1
VW1
R2 R3
R0 R1
R0 R1
R2 R3
Characteristics subject to change without notice
REGISTER
REGISTER
COUNTER
COUNTER
WIPER
WIPER
(WCR)
(WCR)
RESISTOR
RESISTOR
ARRAY
ARRAY
POT 2
POT 3
2
POT digitally
3864 ILL F07.1
VH2
VL2
VW2
VH3
VL3
VW3

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X9241MP Summary of contents

Page 1

PPLICATION OTES AND EVELOPMENT AN20 • AN42–48 • AN50–53 • AN73 • XK9241 Terminal Voltage 5V, 64 Taps X9241 2 Quad E POT FEATURES • 2 Four ...

Page 2

X9241 PIN DESCRIPTIONS Host Interface Pins Serial Clock (SCL) The SCL input is used to clock data into and out of the X9241. Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the ...

Page 3

X9241 Acknowledge Acknowledge is a software convention used to provide a positive handshake between the master and slave devices on the bus to indicate the successful receipt of data. The transmitting device, either the master or the slave, will release ...

Page 4

X9241 Instruction Structure The next byte sent to the X9241 contains the instruction and register pointer information. The four most signifi- cant bits are the instruction. The next four bits point to one of four pots and when applicable they ...

Page 5

X9241 Figure 4. Three-Byte Command Sequence SCL SDA Figure 5. Increment/Decrement Command Sequence SCL SDA ...

Page 6

X9241 Table 1. Instruction Set Instruction Read WCR 1 0 Write WCR 1 0 Read Data 1 0 Register Write Data 1 1 Register XFR Data Reg ister to WCR XFR WCR to 1 ...

Page 7

X9241 DETAILED OPERATION 2 All four E POT potentiometers share the serial interface and share a common architecture. Each potentiometer is comprised of a resistor array, a wiper counter register and four data registers. A detailed discussion of the register ...

Page 8

X9241 Cascade Mode The X9241 provides a mechanism for cascading the arrays. That is, the sixty-three resistor elements of one array may be cascaded (linked) with the resistor ele- ments of an adjacent array. Cascade Control Bits The data byte, ...

Page 9

X9241 ABSOLUTE MAXIMUM RATINGS* Temperature under Bias .................. – +135 C Storage Temperature ....................... – +150 C Voltage on SCK, SCL or any Address Input with Respect ................................... Voltage on any V or ...

Page 10

X9241 ENDURANCE AND DATA RETENTION Parameter Minimum Endurance Data Retention CAPACITANCE Symbol (5) C Input/Output Capacitance (SDA) I/O IN (5) C Input Capacitance (A0, A1, A2, A3 and SCL) POWER-UP TIMING Symbol PUR (6) t Power-up to Initiation of Read ...

Page 11

X9241 A.C. CHARACTERISTICS (Over recommended operating conditions unless otherwise stated) Symbol f SCL Clock Frequency SCL t Clock LOW Period LOW t Clock HIGH Period HIGH t SCL and SDA Rise Time R t SCL and SDA Fall Time F ...

Page 12

X9241 Figure 11. Output Bus Timing SCL SDA OUT (ACK) SDA Figure 12. Start Stop Timing SCL SDA DATA IN Figure 13. Write Cycle and Wiper Response Timing SCL CLOCK 8 SDA IN SDA WIPER OUTPUT ...

Page 13

X9241 PACKAGING INFORMATION 20-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P PIN 1 INDEX PIN 1 SEATING PLANE (3.81) 0.150 (2.92) 0.1150 0.014 (0.356) 0.008 (0.2032) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING ...

Page 14

X9241 PACKAGING INFORMATION 20-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S PIN 1 INDEX PIN 1 (4X) 7 0.050 (1.27) 0.010 (0.25) 0.020 (0.50) 0 – 8 0.015 (0.40) 0.050 (1.27) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN ...

Page 15

X9241 PACKAGING INFORMATION 20-LEAD PLASTIC, TSSOP PACKAGE TYPE V 0 – 8 See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) .025 (.65) BSC .169 (4.3) .252 (6.4) BSC .177 (4.5) .252 (6.4) .300 (6.6) .047 (1.20) ...

Page 16

X9241 ORDERING INFORMATION Device LIMITED WARRANTY Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes no warranty, express, statutory, implied description regarding the ...

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