AD5337BRM AD [Analog Devices], AD5337BRM Datasheet

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AD5337BRM

Manufacturer Part Number
AD5337BRM
Description
2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs
Manufacturer
AD [Analog Devices]
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5337BRMZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
FEATURES
AD5337
AD5338, AD5338-1
AD5339
Low power operation: 250 mA @ 3 V, 300 mA @ 5 V
2-wire (I
2.5 V to 5.5 V power supply
Guaranteed monotonic by design over all codes
Power-down to 80 nA @ 3 V, 200 nA @ 5 V
3 power-down modes
Double-buffered input logic
Output range: 0 V to V
Power-on reset to 0 V
Simultaneous update of outputs (LDAC function)
Software clear facility
Data readback facility
On-chip rail-to-rail output buffer amplifiers
Temperature range −40°C to +105°C
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
Industrial process control
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
2 buffered 8-bit DACs in 8-lead MSOP
2 buffered 10-bit DACs in 8-lead MSOP
2 buffered 12-bit DACs in 8-lead MSOP
2
C®compatible) serial interface
REF
SDA
SCL
A0
INTERFACE
LOGIC
POWER-ON
RESET
LDAC
FUNCTIONAL BLOCK DIAGRAM
REGISTER
REGISTER
Dual-Voltage Output, 8-/10-/12-Bit DACs
INPUT
INPUT
AD5337/AD5338/AD5339
2.5 V to 5.5 V, 250 µA, 2-Wire Interface
V
DD
Figure 1.
REGISTER
REGISTER
GND
DAC
DAC
GENERAL DESCRIPTION
AD5337/AD5338/AD5339 are dual 8-, 10-, and 12-bit buffered
voltage output DACs in an 8-lead MSOP package, which
operate from a single 2.5 V to 5.5 V supply, consuming 250 µA
at 3 V. On-chip output amplifiers allow rail-to-rail output swing
with a slew rate of 0.7 V/µs. A 2-wire serial interface operates at
clock rates up to 400 kHz. This interface is SMBus-compatible
at V
The references for the two DACs are derived from one reference
pin. The outputs of all DACs may be updated simultaneously
using the software LDAC function. The parts incorporate a
power-on reset circuit that ensures that the DAC outputs power
up to 0 V and remain there until a valid write to the device
takes place. A software clear function resets all input and DAC
registers to 0 V. A power-down feature reduces the current
consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V).
The low power consumption of these parts in normal operation
makes them ideally suited to portable battery-operated
equipment. The power consumption is typically 1.5 mW at 5 V
and 0.75 mW at 3 V, reducing to 1 µW in power-down mode.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
DD
STRING
DAC A
REFIN
STRING
DAC B
< 3.6 V. Multiple devices can be placed on the same bus.
AD5337/AD5338/AD5339
BUFFER
BUFFER
POWER-DOWN
© 2004 Analog Devices, Inc. All rights reserved.
LOGIC
V
V
OUT
OUT
A
B
www.analog.com

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AD5337BRM Summary of contents

Page 1

FEATURES AD5337 2 buffered 8-bit DACs in 8-lead MSOP AD5338, AD5338-1 2 buffered 10-bit DACs in 8-lead MSOP AD5339 2 buffered 12-bit DACs in 8-lead MSOP Low power operation: 250 300 ...

Page 2

AD5337/AD5338/AD5339 TABLE OF CONTENTS Specifications..................................................................................... 3 AC Characteristics........................................................................ 5 Timing Characteristics ................................................................ 6 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Terminology ...................................................................................... 9 Typical Performance Characteristics ........................................... 11 Functional Description .................................................................. 15 Digital-to-Analog Converter ...

Page 3

SPECIFICATIONS kΩ to GND REF L Table 1. Grade A 1 Parameter Min Typ PERFORMANCE AD5337 Resolution 8 Relative Accuracy ±0.15 ...

Page 4

AD5337/AD5338/AD5339 Grade A 1 Parameter Min Typ 5 LOGIC INPUTS (A0) Input Current V , Input Low Voltage Input High Voltage 2.4 IH 2.1 2.0 Pin Capacitance 3 5 LOGIC INPUTS (SCL, SDA Input High ...

Page 5

AC CHARACTERISTICS kΩ to GND Table 2. 3 Parameter Output Voltage Settling Time AD5337 AD5338 AD5339 Slew Rate Major-Code Transition Glitch Energy Digital Feedthrough Digital Crosstalk ...

Page 6

AD5337/AD5338/AD5339 TIMING CHARACTERISTICS 5.5 V. All specifications T DD Table 3. Limit MIN MAX Parameter (A and B Versions) f 400 SCL 1.3 3 ...

Page 7

ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 4. Parameter V to GND DD SCL, SDA to GND A0 to GND Reference Input Voltage to GND V A− GND OUT OUT Operating Temperature Range Industrial ...

Page 8

AD5337/AD5338/AD5339 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 5. Pin Function Descriptions Pin No. Mnemonic Function 1 V Power Supply Input. These parts can be operated from 2 5.5 V, and the supply should be decoupled to GND. DD ...

Page 9

TERMINOLOGY Relative Accuracy (Integral Nonlinearity, INL) For the DAC, relative accuracy, or integral nonlinearity (INL measure, in LSBs, of the maximum deviation from a straight line passing through the endpoints of the DAC transfer function. Typical INL vs. ...

Page 10

AD5337/AD5338/AD5339 OUTPUT IDEAL VOLTAGE ACTUAL NEGATIVE OFFSET DAC CODE ERROR DEADBAND CODES AMPLIFIER FOOTROOM (1mV) NEGATIVE OFFSET ERROR Figure 4. Transfer Function with Negative Offset GAIN ERROR PLUS OFFSET ERROR OUTPUT VOLTAGE POSITIVE OFFSET Rev Page 10 of ...

Page 11

TYPICAL PERFORMANCE CHARACTERISTICS 1 25° 0.5 0 –0.5 –1 100 150 CODE Figure 6. AD5337 Typical INL Plot 25° –1 ...

Page 12

AD5337/AD5338/AD5339 0. 25° 0.25 MAX DNL MAX INL 0 MIN DNL –0.25 MIN INL –0.50 0 0.5 1.0 1.5 2.0 2.5 3.0 V (V) REF Figure 12. AD5337 INL and DNL Error vs. ...

Page 13

V (V) DD Figure 18. Supply Current vs. Supply Voltage 0.5 0.4 0.3 0.2 +25°C 0.1 0 2.5 3.0 3.5 4.0 4.5 V (V) DD Figure ...

Page 14

AD5337/AD5338/AD5339 150 200 250 I (µA) DD Figure 24. I Histogram with and 2.50 2.49 2.48 2.47 1µs/DIV Figure 25. AD5339 Major-Code Transition Glitch Energy 10 0 –10 –20 ...

Page 15

FUNCTIONAL DESCRIPTION The AD5337/AD5338/AD5339 are dual resistor-string DACs fabricated on a CMOS process with resolutions of 8, 10, and 12 bits, respectively. Each contains two output buffer amplifiers and is written to via a 2-wire serial interface. The DACs operate ...

Page 16

AD5337/AD5338/AD5339 The AD5337/AD5338/AD5339 have a 7-bit slave address. The six MSBs are 000110, and the LSB is determined by the state of the A0 pin. The facility of making hardwired changes to A0 allows the use of one or two ...

Page 17

Multiple-DAC Read Back Sequence. If the user attempts to read back data from more than one DAC at a time, the part reads back the default, power-on reset conditions, i.e., all 0s except for CLR , which is 1. WRITE ...

Page 18

AD5337/AD5338/AD5339 READ OPERATION When reading data back from the AD5337/AD5338/AD5339 DACs, the user begins with an address byte ( 0), after which the DAC acknowledges that it is prepared to receive data by pulling SDA low. This address ...

Page 19

DOUBLE-BUFFERED INTERFACE The AD5337/AD5338/AD5339 DACs all have a double-buffered interface consisting of two banks of registers—an input register and a DAC register per channel. The input register is directly connected to the input shift register, and the digital code is ...

Page 20

AD5337/AD5338/AD5339 APPLICATIONS TYPICAL APPLICATION CIRCUIT The AD5337/AD5338/AD5339 can be used with a wide range of reference voltages for full, one-quadrant multiplying capability over a reference range More typically, these DD devices are used with ...

Page 21

PRODUCT AS A DIGITALLY PROGRAMMABLE WINDOW DETECTOR Figure 39 shows a digitally programmable upper/lower limit detector using the two DACs in the AD5337/AD5338/AD5339. The upper and lower limits for the test are loaded into DAC A and DAC B, which, ...

Page 22

AD5337/AD5338/AD5339 Table 9. Overview of All AD53xx Serial Devices Part No. Resolution No. of DACs Singles AD5300 8 1 AD5310 10 1 AD5320 12 1 AD5301 8 1 AD5311 10 1 AD5321 12 1 Duals AD5302 8 2 AD5312 10 ...

Page 23

Table 10. Overview of AD53xx Parallel Devices Part No. Resolution DNL Singles AD5330 8 ±0.25 AD5331 10 ±0.50 AD5340 12 ±1.00 AD5341 12 ±1.00 Duals AD5332 8 ±0.25 AD5333 10 ±0.50 AD5342 12 ±1.00 AD5343 12 ±1.00 Quads AD5334 8 ...

Page 24

... AD5337ARM −40°C to +105°C AD5337ARM-REEL7 −40°C to +105°C AD5337BRM −40°C to +105°C AD5337BRM-REEL −40°C to +105°C AD5337BRM-REEL7 −40°C to +105°C AD5338ARM −40°C to +105°C AD5338ARM-REEL7 −40°C to +105°C AD5338BRM −40°C to +105°C AD5338BRM-REEL − ...

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