MCP4332T-503E/ML MICROCHIP [Microchip Technology], MCP4332T-503E/ML Datasheet - Page 55
MCP4332T-503E/ML
Manufacturer Part Number
MCP4332T-503E/ML
Description
7/8-Bit Quad SPI Digital POT with Volatile Memory
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.MCP4332T-503EML.pdf
(88 pages)
- Current page: 55 of 88
- Download datasheet (6Mb)
7.5
The Write command is a 16-bit command. The format
of the command is shown in
A Write command to a volatile memory location
changes that location after a properly formatted Write
command (16-clock) have been received.
FIGURE 7-2:
2010 Microchip Technology Inc.
SDI
SDO
Note 1: If an Error Condition occurs (CMDERR = L), all following SDO bits will be low until the CMDERR
D
A
1
1
3
Write Data
Normal and High Voltage
A
D
1
1
2
COMMAND BYTE
A
D
1
1
condition is cleared (the CS pin is forced to the inactive state).
1
A
D
0
1
1
Write Command – SDI and SDO States.
0
1
1
0
1
1
Figure
D
9
1
0
7-2.
D
1
0
8
D
1
0
7
D
6
1
0
D
5
1
0
DATA BYTE
D
4
1
0
D
3
1
0
D
1
0
2
7.5.1
The write operation requires that the CS pin be in the
active state (V
the inactive state (V
(V
data byte) is then clocked in on the SCK and SDI pins.
Once all 16 bits have been received, the specified
volatile address is updated. A write will not occur if the
write command isn’t exactly 16 clocks pulses. This
protects against system issues from corrupting the
nonvolatile memory locations.
Figure 6-2
for a single write.
D
1
0
1
IL
). The 16-bit Write command (command byte and
D
1 Valid Address/Command combination
0
0 Invalid Address/Command combination
and
SINGLE WRITE TO VOLATILE
MEMORY
IL
MCP433X/435X
or V
Figure 6-3
IHH
IH
) and is driven to the active state
). Typically, the CS pin will be in
show possible waveforms
DS22242A-page 55
(1)
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