SAA7806H NXP [NXP Semiconductors], SAA7806H Datasheet
SAA7806H
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SAA7806H Summary of contents
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SAA7806 One chip automotive CD audio device Rev. 01 — 20 June 2005 1. General description The SAA7806 single chip solution CD audio decoder, digital servo, audio DAC, pre-amp, laser driver and integrated ARM7TDMI-S microcontroller, targeted at automotive ...
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Philips Semiconductors Integrated digital HF/mirror detector with measurement of minimum and maximum peak values, amplitude and offset Integrated LCD controller/driver (pins multiplexed with General Purpose Input/Outputs (GPIOs) Integrated CD-TEXT decoder 1 QFP100 package with 0.65 mm pin pitch Separate left ...
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... Philips Semiconductors 3. Ordering information Table 1: Type number Package SAA7806H 4. Block diagram CHANNEL DECODER HF DIGITAL ADC DECODER AHB DECODER SERVO LF ANALOG DIGITAL ADCs SERVO ANALOG AUDIO DAC LINE AND LASER DRIVER HEADPHONE OUT Fig 1. SAA7806 top level block diagram 9397 750 13697 ...
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... SEG3/GPIO7 SEG4/GPIO8 24 SEG5/GPIO9 25 SEG6/GPIO10 26 27 SEG7/GPIO11 SEG8/GPIO12 28 SEG9/GPIO13 LCD Fig 2. Pin configuration 9397 750 13697 Objective data sheet One chip automotive CD audio device SAA7806H Rev. 01 — 20 June 2005 SAA7806 80 HF_MON 79 V SSA1 78 MONITOR 77 LASER 76 LPOWER 75 TDO2/GPIO31 74 INT/GPIO30/RTCK 73 TMS2/GPIO29 72 TDI2/GPIO28 ...
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Philips Semiconductors 5.2 Pin description Table 2: Symbol V SS(DACF) V SS(DACB) BUF_OUT_L BUF_OUT_R V DDA3 A_IN_1/GPIO0 A_IN_2/GPIO1 TX/GPIO_ANA RX/GPIO_ANA SDA SCL V SSD1 RESET_N V DDD1 LKILL RKILL V SSP1 DOBM V DDP1 SEG0/GPIO4 SEG1/GPIO5 SEG2/GPIO6 SEG3/GPIO7 SEG4/GPIO8 SEG5/GPIO9 ...
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Philips Semiconductors Table 2: Symbol SEG18/GPIO22/MEAS SEG19/GPIO23/CFLG COM0/GPIO24 COM1/GPIO25 COM2/GPIO26 COM3/GPIO27 V SSP2 INT_EX_ROM V DDP2 WCLI SCLI SDI EF DATA WCLK SCLK SYNC V4/CL16 V SSP3 V DDP3 TDI TMS TCK TRST_N TDO MOTO1 MOTO2 ...
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Philips Semiconductors Table 2: Symbol V SSA1 HF_MON V DDA1 AUX_L AUX_R V DDA2 OPU_REF_OUT V SSA2 OSCOUT OSCIN V DD(DAC) DAC_LP DAC_LN DAC_VREF DAC_RN DAC_RP Table 3: Type AI AIO AO AOBS B ...
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Philips Semiconductors 6. Functional description 6.1 Analog data acquisition The input signals from the OPU photodiodes contain information used in the servo loops and the high frequency data from which the audio samples are reconstructed. The SAA7806 contains all the ...
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Philips Semiconductors The level shifter’s purpose is to act as a summing node for the DC cancellation and to produce a current that is referenced to an internal bias voltage and therefore independent ref The output current ...
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Philips Semiconductors The four diode signals D1, D2, D3 and D4 are summed in the first RF amplifier. The gain of the first amplifier is controlled by G1FIXED[3:0] (FIXED = static), register AGCGain, bits 7:4. A second gain stage has ...
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Philips Semiconductors Sys_clk is the primary clock used by the channel decoder and ARM clock generators. This clock operates at 67 MHz with either an 8 MHz or 16 MHz crystal or resonator. The divide-by-2 is selected when a 16 ...
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Philips Semiconductors to auxiliary input modes. This path has a specification of SNR = 55 dB and THD < 0.3 % and can be used for tuner input processing. These performance figures are below that available when the normal CD-Audio ...
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MULTIPLEXER aux L AUX_L spare reg A if_auxin_sel MULTIPLEXER aux R AUX_R MULTIPLEXER DAC ...
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Philips Semiconductors 6.5 AHB core clock generation Two independent clock dividers are used within SAA7806, one for CD-Slim and the other for the ARM Advanced High performance Bus (AHB) core. description of the SAA7806 clocking, AHB fixed clock frequencies are ...
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Philips Semiconductors • RL2PB mechanism • EFM demodulator with sync interpolation • CD-TEXT and subcode Q-channel extraction blocks with software-interface via registers • Decoding, de-interleaving and Reed-Solomon error correction according to CD CIRC standards • On-chip de-interleaving SRAM memory • ...
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ANALOG ADC INT/DUMP 000 PEAK DETECTORS AGC AOC 060-0A0 error correction CD-TEXT info 1B0-1BC Q-SUBCODE ERCO 1A0-1A8 MEMPROC from RL2 EFM (CIRC DEC pushback DEMODULATOR AND FIFO) 168 SUBCPU CLOCK SHOP MOTOR CONTROL AND ...
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Philips Semiconductors 6.6.3 Clock control xclk (67 MHz) Fig 10. Clock control The clock control block defines the clock frequencies for four clock domains. 9397 750 13697 Objective data sheet cl1clock INT AND adc_clk DUMP hf_clk (67 MHz) sysclock 33 ...
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Philips Semiconductors 6.6.3.1 Signal xclk Most internal clocks are derived from xclk. This clock is the output of the clock multiplier in the analog part and has a fixed frequency of 67.7376 MHz = 8.4672 (crystal oscillator ...
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Philips Semiconductors 6.6.4 Decoder to ARM microcontroller interface The decoder core is internally connected to the ARM core via the AHB interface for register access to the decoder internal configuration registers. 6.6.4.1 Programming interface Decoder registers are programmed through the ...
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Philips Semiconductors On the sampled HF, bit recovery is done by a full digital PLL and slicer. Before the sampled signal enters the PLL section preprocessed by a signal conditioning block. This consists of an integrate and dump ...
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Philips Semiconductors The integrate and dump block converts the incoming samples at the hf_clk frequency into a stream of one sample per sysclk period. It averages a number of samples to achieve this. If the division factor for the system ...
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Philips Semiconductors Fig 13. Peak detection diagram with decay filter The minimum and maximum peaks of the incoming signal are measured. Switch S1 takes the largest value at its inputs. Switch S2 takes the minimum value at its inputs. The ...
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Philips Semiconductors The minimum and maximum peaks of the incoming signal are measured during a programmable window period. The highest and lowest value samples within this window are used to update maxpeak and minpeak. The window width of the measurement ...
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Philips Semiconductors Together with the noise filter on the peak detector this prevents noise occurring on the RF which would result in volatile gain regulation. To decrease volatile behavior even further a hysteresis window with a width of one gain ...
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Philips Semiconductors The offset boundary should be programmed not too tight good value. This is to avoid a volatile AOC. The BW of the loops should never be programmed too high (’fast’) with respect to the peak ...
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Philips Semiconductors 6.6.5.2 Bit detector from signal SRC conditioning Fig 16. Bit detection The bit detector block contains the slice level circuitry, a noise filter to limit HF-EFM signal noise contribution, an equalizer, a zero-transition detector, a run length pushback ...
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Philips Semiconductors Fig 17. Equalizer The first and last tap can be programmed via register PLLEqualiser. Usable EFM bit clock range: following constraints: It should be less than 2 It should be larger than 0.25 Or: 0.25 < f Only ...
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Philips Semiconductors Fig 18. PLL Bode diagram The frequencies f higher bandwidths for use after a defect (see programmed in register PLLBandWidthHigh. When the PLL is in-lock the recovered PLL clock equals the channel bit clock. Detection of PLL lock: ...
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Philips Semiconductors Influencing PLL behavior: mainly for debugging purposes, and also to make difficult applications possible. The PLL operation can be influenced in two ways. First possible to hand-select the state the PLL is in (in-lock, inner lock, ...
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Philips Semiconductors 6.6.5.4 Run length 2 pushback detector If this circuit is switched on, all run length 1 and 2 symbols (invalid run lengths) are pushed back to run length 3. For RL2s, the circuit will determine the transition that ...
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Philips Semiconductors Use of jitter measurement: measurement. It gives the average square value of the bit detection jitter. The jitter is measured directly before the bit detection in this device, and contains contributions due to various imperfections of the complete ...
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Philips Semiconductors Table 8: Bit number [1] The start bit is always preceded by 17 pause ...
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Philips Semiconductors furthermore a new sync is detected in the data shortly after a previous sync signal (interpolated or real) no new sync signal will be generated, because this means the frame has ‘slipped’. After enough data byte periods, the ...
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Philips Semiconductors Table 9: Address/Byte After finishing subcode read the microcontroller must release the interface to allow the decoder to capture new subcode information. This is done by issuing a ...
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Philips Semiconductors Remark: If CDTEXTControl(FREEZEEN) is disabled, the interface is not held during readback, which means that the current CD-TEXT pack can be overwritten by the next one before all bytes of the current pack are read out. Such an ...
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Philips Semiconductors The FIFO filling is defined as this ‘data latency’ plus the number of extra frames stored in the FIFO. The filling of the FIFO must be maintained within certain limits. 118 frames is the minimum required for de-interleaving ...
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Philips Semiconductors 6.6.6.5 Error corrector statistics CFLG: information is serial, similar to that used on the MEAS pin. The serial format consists of a pause bit followed by a start bit. This start bit is followed by the data bits. ...
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Philips Semiconductors MEMPROC SOFT MUTE ERROR DETECT SILENCE DETECT Fig 21. Back-end audio functions Decoded and error corrected CD-data streams into the audio back-end from the memory processor to the output interfaces. Some audio filtering can also be done (in ...
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Philips Semiconductors Fig 22. Error concealment on CD audio Audio samples flagged as uncorrectable, neighbored by 2 good samples - or a held and a good sample, will be interpolated. Audio samples flagged as uncorrectable, which are not followed by ...
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Philips Semiconductors Another condition that will set both left and right kill signals is the soft mute block reaching ‘fully muted’ (volume-stage 0). 6.6.7.6 De-emphasis filter This feature only affects the I used to remove pre-emphasis from tracks which have ...
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Philips Semiconductors Table 11: Pass band - - - - When upsampling is enabled, the audio data output rate on the I four times higher than without upsampling. Therefore the I frequency has to be four times higher. This means ...
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Philips Semiconductors • Bclk: all other I • WCLK: indicates the start of a new 16/18-bit word on the dataline, and differentiates between left and right sample • DATA: 16/18-bit data words are outputted via this line, 1-bit / bclk-period ...
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Philips Semiconductors 6.6.7.11 Subcode interface Subcode data is output via the IISSubo (pin V4) port. This data can be sampled using the 2 I S-bus SYNC signal (see indicates that the serial subcode line IISSubo contains the MSB of a ...
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Philips Semiconductors • The subcode syncs S0 and S1 are presented as all zeros on the interface (even P-channel), such that the last subcode byte of a subcode-frame, and the first byte of the next frame are separated by 28 ...
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Philips Semiconductors The set point can be programmed via register MotorFreqSet. The selection of the motor frequency input is programmed via MotorGainSet2(MotorFreqSource). 6.6.8.2 Position error The position error will be used to fine tune the motor speed during ‘slave mode’, ...
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Philips Semiconductors 6.6.8.5 Writing and reading motor integrator value It is possible to obtain the integrator value by reading the registers MotorIntLSB and MotorIntMSB. The integrator can be written at the same location. By opening all switches, the user can ...
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Philips Semiconductors The command byte is the first to be loaded and can be considered as two nibbles. The upper (most significant) nibble represents the command itself whilst the lower (least significant) nibble tells the PDSIC how many parameter bytes ...
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Philips Semiconductors IRQ cycle time of ~60 s SRV_FC0 SRV_FC1 IRQ inreq_clr natural duration of Fig 28. Function of servo IRQ signal 6.7.2 Diode signal processing The photo detector in conventional two-stage three-beam compact disc systems normally contains six discrete ...
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Philips Semiconductors An internal flag is generated by means of the central aperture signal and an adjustable reference level. This signal is used to provide extra protection for the Track-Loss (TL) generation, the focus start-up procedure and the dropout detection. ...
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Philips Semiconductors When focus is achieved and the level on the FE enabled to switch on when the next zero crossing is detected in the FE 6.7.4.2 Focus position control loop The focus control loop contains a digital PID controller ...
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Philips Semiconductors Table 12: Parameter [1] Refer to Table 3 of the HSI specification . 6.7.4.3 Dropout detection This detector can be influenced by one parameter ...
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Philips Semiconductors satellite inputs scaled radial 86 R1 NORMALIZER 87 R2 zero on defect or drop out Fig 32. Functional diagram of radial PID system An explanation of the different parameters is given below. The frequency response of this system ...
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Philips Semiconductors 6.7.5.2 Level initialization During start-up an automatic adjustment procedure is activated to set the values of the radial error gain (re_gain), offset (re_offset) and satellite sum gain (sum_gain) for TPI level generation. The initialization procedure runs in a ...
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Philips Semiconductors If the number of tracks remaining is greater than the brake_distance then the sledge jump mode should be activated or, the actuator jump should be performed. The requested jump size together with the required sledge breaking distance at ...
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Philips Semiconductors 6.7.7 Defect detection A defect detection circuit is incorporated into the SAA7806 defect is detected, the radial and focus error signals may be zeroed, resulting in better playability. The defect detector can be switched off, applied ...
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Philips Semiconductors When the automatic sequencers are not used it is possible to generate timer interrupts, defined by the time_parameter coefficient. 6.7.10 Driver interface The control signals (pins RA, FO and SL) for the mechanism actuators are pulse density modulated. ...
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Philips Semiconductors 6.9 ARM7 system The following diagram identifies the component parts which make up the system. The following sections give you a top-level description of the individual blocks. STATIC MEMORY LASER INTERFACE DRIVER UNIT LCD AUDIO DRIVER DAC Fig ...
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Philips Semiconductors The 3 stage pipelines can be defined in the following stages: • Fetch cycle; this is used to fetch the instruction from the memory • Decode cycle; this is used to decode the registers, used in the instructions ...
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Philips Semiconductors 6.9.4 RAM interface The RAM interface provides an interface between the onboard 32 kB SRAM memory and the ARM via the AHB bus. The specification of this interface is: • 32-bit AHB interface width • 67 MHz maximum ...
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Philips Semiconductors 6.9.8 Universal asynchronous receiver transceiver • 4 byte Tx FIFO depth • 4 byte Rx FIFO depth • Both Rx and Tx can have specific fill levels set before an interrupt is triggered • Format of data character ...
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Philips Semiconductors 9. Characteristics Table 18: Characteristics 3 3 DDP DDA DDD Symbol Parameter Supply V supply voltage, digital regulator DDD V supply voltage, digital pads DDP V supply voltage, analog DDA ...
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Philips Semiconductors Table 18: Characteristics …continued 3 3 DDP DDA DDD Symbol Parameter S/N signal-to-noise ratio V output swing (peak-to-peak o(p-p) value) d distortion PSRR power supply rejection G total gain range ...
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Philips Semiconductors Table 18: Characteristics …continued 3 3 DDP DDA DDD Symbol Parameter Output pin OSCOUT f crystal frequency OSCOUT resonator frequency g mutual conductance at start- feedback capacitance F ...
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Philips Semiconductors Table 18: Characteristics …continued 3 3 DDP DDA DDD Symbol Parameter I HIGH-level output current OH I HIGH-level short-circuit current OH(sc) I LOW-level short-circuit current OL(sc) AC specifications; input pins ...
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V 3.3 V 3.3 V pin 81 pin 90 pin 95 pin 5 C13 C15 C17 C14 C16 C18 2.2 nF 2.2 nF 2.2 nF (25 V) (25 V) (25 V) ...
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Philips Semiconductors 11. Package outline QFP100: plastic quad flat package; 100 leads (lead length 1.95 mm); body 2 pin 1 index 100 1 e DIMENSIONS (mm are the original dimensions) A UNIT ...
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Philips Semiconductors 12. Soldering 12.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...
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Philips Semiconductors – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, ...
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Philips Semiconductors [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, ...
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Philips Semiconductors 14. Revision history Table 20: Revision history Document ID Release date SAA7806_1 20050620 9397 750 13697 Objective data sheet Data sheet status Change notice Objective data sheet - Rev. 01 — 20 June 2005 SAA7806 One chip automotive ...
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Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...
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Philips Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...
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Philips Semiconductors 6.9.4 RAM interface . . . . . . . . . . . . . . . . . . . . . . . . . 59 2 6.9.5 I C-bus interface . . . . ...