MK60N256VLL100 FREESCALE [Freescale Semiconductor, Inc], MK60N256VLL100 Datasheet

MK60N256VLL100

Manufacturer Part Number

MK60N256VLL100

Description

Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Manufacturer

FREESCALE [Freescale Semiconductor, Inc]

Datasheet

1.MK60N256VLL100.pdf (73 pages)

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Data Sheet: Product Preview

K60 Sub-Family Data Sheet

Supports the following:

MK60N256VLL100, MK60X256VLL100,

MK60N512VLL100

Features

• Operating Characteristics

• Performance

• Memories and memory interfaces

• Clocks

• System peripherals

This document contains information on a product under development. Freescale

reserves the right to change or discontinue this product without notice.

Preliminary

– Voltage range: 1.71 to 3.6 V

– Flash write voltage range: 1.71 to 3.6 V

– Temperature range (ambient): -40 to 105°C

– Up to 100 MHz ARM Cortex-M4 core with DSP

– Up to 512 KB program flash memory on non-

– Up to 256 KB program flash memory on

– Up to 256 KB FlexNVM on FlexMemory devices

– 4 KB FlexRAM on FlexMemory devices

– Up to 128 KB RAM

– Serial programming interface (EzPort)

– FlexBus external bus interface

– 3 to 32 MHz crystal oscillator

– 32 kHz crystal oscillator

– Multi-purpose clock generator

– 10 low-power modes to provide power optimization

– Memory protection unit with multi-master

– 16-channel DMA controller, supporting up to 64

– External watchdog monitor

– Software watchdog

– Low-leakage wakeup unit

instructions delivering 1.25 Dhrystone MIPS per

MHz

FlexMemory devices

based on application requirements

protection

request sources

• Security and integrity modules

• Human-machine interface

• Analog modules

• Timers

– Hardware CRC module to support fast cyclic

– Hardware random-number generator

– Hardware encryption supporting DES, 3DES, AES,

– 128-bit unique identification (ID) number per chip

– Low-power hardware touch sensor interface (TSI)

– General-purpose input/output

– Two 16-bit SAR ADCs

– Programmable gain amplifier (up to x64) integrated

– 12-bit DAC

– Three analog comparators (CMP) containing a 6-bit

– Voltage reference

– Programmable delay block

– Eight-channel motor control/general purpose/PWM

– Two 2-channel quadrature decoder/general purpose

– IEEE 1588 timers

– Periodic interrupt timers

– 16-bit low-power timer

– Carrier modulator transmitter

– Real-time clock

redundancy checks

MD5, SHA-1, and SHA-256 algorithms

into each ADC

DAC and programmable reference input

timer

timers

K60P100M100SF2

Document Number: K60P100M100SF2

Rev. 4, 3/2011

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