MC68HC11A1 MOTOROLA [Motorola, Inc], MC68HC11A1 Datasheet - Page 36

• Manufacturer Part Number: MC68HC11A1
• Description: 8-Bit Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

TMSK1 — Timer Interrupt Mask 1
OC1I–OC5I — Output Compare x Interrupt Enable
IC1I–IC3I — Input Capture x Interrupt Enable
TFLG1 — Timer Interrupt Flag 1
OC1F–OC5F — Output Compare x Flag
IC1F–IC3F — Input Capture x Flag
TMSK2 — Timer Interrupt Mask 2
TOI — Timer Overflow Interrupt Enable
RTII — Real-Time Interrupt Enable
PAOVI — Pulse Accumulator Overflow Interrupt Enable
PAII — Pulse Accumulator Input Edge Interrupt Enable
PR1 and PR0 — Timer Prescaler Select
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MOTOROLA
RESET:
RESET:
RESET:
If the OCxI enable bit is set when the OCxF flag bit is set, a hardware interrupt sequence is requested.
If the ICxI enable bit is set when the ICxF flag bit is set, a hardware interrupt sequence is requested.
Clear flags by writing a one to the corresponding bit position(s).
Set each time the counter matches output compare x value.
Set each time a selected active edge is detected on the ICx input line.
Refer to 9 Pulse Accumulator.
Refer to 9 Pulse Accumulator.
In normal modes, PR1 and PR0 can only be written once, and the write must be within 64 cycles after
reset. Refer to Table 6 for specific timing values.
0 = TOF interrupts disabled
1 = Interrupt requested when TOF is set to one
0 = RTIF interrupts disabled
1 = Interrupt requested when RTIF is set to one
OC1F
OC1I
Bit 7
Bit 7
Bit 7
TOI
0
0
0
Bits in TMSK1 correspond bit for bit with flag bits in TFLG1. Ones in TMSK1 enable
the corresponding interrupt sources.
Bits in TMSK2 correspond bit for bit with flag bits in TFLG2. Ones in TMSK2 enable
the corresponding interrupt sources.
OC2F
OC2I
RTII
6
0
6
0
6
0
PAOVI
OC3F
OC3I
5
0
5
0
5
0
OC4F
OC4I
PAII
4
0
4
0
4
0
NOTE
NOTE
OC5F
OC5I
3
0
3
0
3
0
0
IC1F
IC1I
2
0
2
0
2
0
0
IC2F
PR1
IC2I
1
0
1
0
1
0
$1022
$1023
$1024
IC3F
Bit 0
Bit 0
Bit 0
PR0
IC3I
0
0
0
MC68HC11A8TS/D
MC68HC11A8