MC68HC705BD3 FREESCALE [Freescale Semiconductor, Inc], MC68HC705BD3 Datasheet - Page 42

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MC68HC705BD3

Manufacturer Part Number
MC68HC705BD3
Description
High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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5
This bit is set when the 8-bit ripple counter overflows from $FF to $00; a timer overflow interrupt
will occur, if TOFIE (bit 5) is set. TOF is cleared by writing a “0” to the bit.
RTIF - Real Time Interrupt Flag
When RTIF is set, a CPU interrupt request is generated if RITE is set. The clock frequency that
drives the RTI circuit is E/16384 giving a maximum interrupt period of 8.19ms at a bus rate of
2MHz. RTIF is cleared by writing a “0” to the bit.
TOFIE - Timer Overflow Interrupt Enable
RTIE - Real Time Interrupt Enable
IRQN - IRQ Pin Trigger Option
RT1, RT0 - Rate Select for COP watchdog and RTI
See Section 5.3 on watchdog reset.
5.3
The COP (Computer Operating Properly) watchdog timer function is implemented by using the
output of the Multi-Function Timer counter. The minimum COP reset rates are controlled by RT0
and RT1 of MFT Control and Status register. If the COP circuit times out, an internal reset is
generated and the reset vector is fetched (at $3FFE & $3FFF). Preventing a COP time-out is
achieved by writing a “0” to bit 0 of address $3FF0. The COP counter has to be cleared periodically
by software with a period less than COP reset rate. The COP watchdog timer is always enabled
and continues to count in Wait mode.
5-2
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
COP Watchdog
A real time interrupt has occurred.
A real time interrupt has not occurred.
TOF interrupt is enabled.
TOF interrupt is disabled.
Real time interrupt is enabled.
Real time interrupt is disabled.
Negative edge triggering for IRQ only
Level and negative edge triggering for IRQ
MULTI-FUNCTION TIMER
MC68HC05BD3
TPG

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