MC68HC705BD3 FREESCALE [Freescale Semiconductor, Inc], MC68HC705BD3 Datasheet - Page 63
MC68HC705BD3
Manufacturer Part Number
MC68HC705BD3
Description
High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC68HC705BD3.pdf
(112 pages)
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8.1.1.2
Since the input at HSYNC can be either a pure horizontal sync signal or a composite sync signal,
different methodologies are used in polarity correction.
Unlike the polarity correction for VSYNC, both the high pulse and low pulse of the sync signal at
HSYNC are examined. If the pulse, either active high or low, is longer than a certain period (8 s
or 16 t
sync signal will be confirmed as a positive polarity sync signal, and will be inverted. If there are 8
consecutive high long pulses, it will be confirmed as a negative polarity sync signal.
The operation of this module is also continuous, and the error margin is equal to the period of the
pre-set number (default is 8) of horizontal sync pulses. At power-up or system reset, negative
polarity at input is assumed.
8.1.2
The sync detector determines whether the incoming sync signal is active. Both sync high and low
pulse widths must be within the specific values to be regarded as active. HDET and VDET flags
will be set if the HSYNC and VSYNC signals are active, respectively.
MC68HC05BD3
CYC
), it will be regarded as a long pulse. If there are 8 consecutive low long pulses, the input
Separate Horizontal Or Composite Sync Input
Sync Detection
Figure 8-2 Sync Signal Polarity Correction
Negative polarity pure horizontal sync signal
Positive polarity pure horizontal sync signal
SYNC SIGNAL PROCESSOR
Negative polarity composite sync signal
Positive polarity composite sync signal
TPG
8-3
8