MC68HC705BD3 FREESCALE [Freescale Semiconductor, Inc], MC68HC705BD3 Datasheet - Page 64

• Manufacturer Part Number: MC68HC705BD3
• Description: High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

8
8.1.3
If either HSYNC or VSYNC is absent, a free-running sync signal generator will be enabled. It
generates a pseudo vertical sync at 63.5Hz (1/(tcyc x 31488)) and a pseudo horizontal sync at
either 48.8KHz (1/(t
set of free running sync signals replaces the inactive sync signals at the inputs and will be fed to
the VTTL and HTTL pins if the pins are selected for VTTL and HTTL function.
8.1.4
Figure 8-3 is a block diagram of the Sync Separator which includes the duration counters for the
high and low pulses, a counter for the number of valid horizontal sync pulses, a register to hold
the number of horizontal lines per frame, a logic block for horizontal and vertical sync pulse
separation, a comparator, and a sync pulse insertion circuit.
The Low pulse duration counter examines the low pulse width of the incoming composite sync
signal. If it is within the horizontal sync pulse limit (8 s or 16 t
detected and the horizontal sync pulse counter is advanced. If the low pulse is wider than the limit,
8-4
CLK
(After polarity correction)
HSYNC
High pulse duration counter
Low pulse duration counter
Free-running Pseudo Sync Signal Generator
Sync Separation
CYC
x 41)) or 62.5KHz (1/(t
SYNC SIGNAL PROCESSOR
Figure 8-3 Sync Separator
finish
Horizontal sync pulse counter
reset
CYC
load
x 32)), depending on the status of FOUT. This
count
Hsync
Sync separation logic
Sync insertion circuit
CYC
Comparator
), a horizontal sync pulse is
equal
in
Vsync
Horizontal Sync Register
MC68HC05BD3
out
TPG