MC68HC705P9CDW FREESCALE [Freescale Semiconductor, Inc], MC68HC705P9CDW Datasheet - Page 114

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MC68HC705P9CDW

Manufacturer Part Number
MC68HC705P9CDW
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Timer
9.7.5 Input Capture Registers
Technical Data
114
NOTE:
When a selected edge occurs on the TCAP pin, the current high and low
bytes of the 16-bit counter are latched into the read-only input capture
registers (ICRH and ICRL). Reading ICRH before reading ICRL inhibits
further captures until ICRL is read. Reading ICRL after reading the timer
status register clears the input capture flag (ICF). Writing to the input
capture registers has no effect.
To prevent interrupts between readings of ICRH and ICRL, set the
interrupt mask (I bit) in the condition code register before reading ICRH,
and clear the mask after reading ICRL.
Reset:
Reset:
$0014
$0015
Read:
Read:
Write:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 9-16. Input Capture Registers (ICRH and ICRL)
Bit 15
Bit 7
Bit 7
7
Go to: www.freescale.com
= Unimplemented
14
6
6
6
Timer
13
5
5
5
Unaffected by reset
Unaffected by reset
12
4
4
4
11
3
3
3
MC68HC705P9 — Rev. 4.0
10
2
2
2
1
1
9
1
MOTOROLA
Bit 0
Bit 8
Bit 0
0

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