MC68HC705P9CDW FREESCALE [Freescale Semiconductor, Inc], MC68HC705P9CDW Datasheet - Page 122

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MC68HC705P9CDW

Manufacturer Part Number
MC68HC705P9CDW
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Serial Input/Output Port (SIOP)
10.4.1.2 PB5/SDO
10.4.1.3 PB6/SDI
Technical Data
122
The first falling edge on PB7/SCK begins a transmission. At this time the
first bit of received data is accepted at the PB6/SDI pin and the first bit
of transmitted data is presented at the PB5/SDO pin.
The PB5/SDO pin is the SIOP data output. Between transfers, the state
of the PB5/SDO pin reflects the value of the last bit shifted out on the
previous transmission, if there was one. To preset the beginning state,
write to the corresponding port data bit before enabling the SIOP. On the
first falling edge on the PB7/SCK pin, the first data bit to be shifted out
appears at the PB5/SDO pin.
After SPE is set, the PB5/SDO output driver can be disabled by writing
a zero to the corresponding data direction register bit of the port, thereby
configuring PB5/SDO as a high-impedance input.
The PB6/SDI pin is the SIOP data input. Valid SDI data must be present
for an SDI setup time, t
must remain valid for an SDI hold time, t
serial clock. (See
Freescale Semiconductor, Inc.
For More Information On This Product,
Serial Input/Output Port (SIOP)
Go to: www.freescale.com
Table 10-1
S
, before the rising edge of the serial clock and
and
Table
H
10-2.)
, after the rising edge of the
MC68HC705P9 — Rev. 4.0
MOTOROLA

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