MC68HC705P9CDW FREESCALE [Freescale Semiconductor, Inc], MC68HC705P9CDW Datasheet - Page 76

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MC68HC705P9CDW

Manufacturer Part Number
MC68HC705P9CDW
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Low Power Modes
Technical Data
76
When the MCU exits stop mode, processing resumes after a
stabilization delay of 4064 oscillator cycles.
An active edge on the PD7/TCAP pin during stop mode sets the ICF flag
when an external interrupt brings the MCU out of stop mode. An external
interrupt also latches the value in the timer registers into the input
capture registers.
If a reset brings the MCU out of stop mode, then an active edge on the
PD7/TCAP pin during stop mode has no effect on the ICF flag or the
input capture registers.
See
INTERNAL
INTERNAL
ADDRESS
(NOTE 2)
(NOTE 1)
(NOTE 3)
IRQ/V
Notes:
IRQ/V
CLOCK
Freescale Semiconductor, Inc.
RESET
1. Internal clocking from OSC1 pin
2. Edge-triggered external interrupt mask option
3. Edge- and level-triggered external interrupt mask option
4. Reset vector shown as example
OSC
BUS
Figure 6-1
For More Information On This Product,
PP
PP
t
t
ILIH
Go to: www.freescale.com
RL
Low Power Modes
for stop recovery timing information.
Figure 6-1. Stop Recovery Timing
(NOTE 4)
1FFE
4064 t
1FFE
CYC
1FFE
MC68HC705P9 — Rev. 4.0
1FFE
RESET OR INTERRUPT
1FFE
VECTOR FETCH
MOTOROLA
1FFF

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