MC68HC705P9CDW FREESCALE [Freescale Semiconductor, Inc], MC68HC705P9CDW Datasheet - Page 81

• Manufacturer Part Number: MC68HC705P9CDW
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Technical Data — MC68HC705P9
7.1 Contents
7.2 Introduction
MC68HC705P9 — Rev. 4.0
MOTOROLA
NOTE:
7.2
7.3
7.3.1
7.3.2
7.4
7.4.1
7.4.2
7.5
7.5.1
7.5.2
7.6
7.6.1
7.6.2
Twenty bidirectional pins and one input-only pin form four parallel
input/output (I/O) ports. All the bidirectional port pins are programmable
as inputs or outputs.
Connect any unused I/O pins to an appropriate logic level, either V
V
operation, termination reduces excess current consumption and the
possibility of electrostatic damage.
SS
Freescale Semiconductor, Inc.
Section 7. Parallel Input/Output (I/O) Ports
. Although the I/O ports do not require termination for proper
For More Information On This Product,
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Port A Data Register (PORTA). . . . . . . . . . . . . . . . . . . . . . . 83
Data Direction Register A (DDRA) . . . . . . . . . . . . . . . . . . . .83
Port B Data Register (PORTB). . . . . . . . . . . . . . . . . . . . . . . 85
Data Direction Register B (DDRB) . . . . . . . . . . . . . . . . . . . .86
Port C Data Register (PORTC) . . . . . . . . . . . . . . . . . . . . . . 88
Data Direction Register C (DDRC) . . . . . . . . . . . . . . . . . . . .89
Port D Data Register (PORTD) . . . . . . . . . . . . . . . . . . . . . . 91
Data Direction Register D (DDRD) . . . . . . . . . . . . . . . . . . . .92
Parallel Input/Output (I/O) Ports
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Technical Data
DD
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