MC68HC705P9CDW FREESCALE [Freescale Semiconductor, Inc], MC68HC705P9CDW Datasheet - Page 85

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MC68HC705P9CDW

Manufacturer Part Number
MC68HC705P9CDW
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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7.4 Port B
7.4.1 Port B Data Register (PORTB)
MC68HC705P9 — Rev. 4.0
MOTOROLA
NOTE:
NOTE:
Function:
Alternate
Port B is a 3-bit I/O port that shares its pins with the serial I/O port
(SIOP).
Do not use port B for general-purpose I/O while the SIOP is enabled.
The port B data register contains a latch for each of the three port B pins.
PB[7:5] — Port B Data Bits
Writing to data direction register B does not affect the data direction of
port B pins that are being used by the SIOP. However, data direction
register B always determines whether reading port B returns the states
of the latches or the states of the pins.
SCK — Serial Clock
Reset:
$0001
Read:
Write:
These read/write bits are software programmable bits. Data direction
of each port B pin is under the control of the corresponding bit in data
direction register B. Reset has no effect on port B data.
When the SIOP is enabled, SCK is the SIOP clock output (in master
mode) or the SIOP clock input (in slave mode).
Freescale Semiconductor, Inc.
For More Information On This Product,
SCK
Figure 7-5. Port B Data Register (PORTB)
Bit 7
PB7
Parallel Input/Output (I/O) Ports
Go to: www.freescale.com
= Unimplemented
PB6
SDI
6
SDO
PB5
5
Unaffected by reset
4
0
3
0
Parallel Input/Output (I/O) Ports
2
0
1
0
Technical Data
Bit 0
Port B
0
85

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