MC68HC705P9CDW FREESCALE [Freescale Semiconductor, Inc], MC68HC705P9CDW Datasheet - Page 90

• Manufacturer Part Number: MC68HC705P9CDW
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Parallel Input/Output (I/O) Ports
7.6 Port D
Technical Data
90
Writing a logic one to a DDRC bit enables the output buffer for the
corresponding port C pin; a logic zero disables the output buffer.
When bit DDRCx is a logic one, reading address $0002 reads the PCx
data latch. When bit DDRCx is a logic zero, reading address $0002
reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
operation of the port C pins.
Port D is a 2-bit port with one I/O pin and one input-only pin. Port D
shares the input-only pin, PD7/TCAP, with the capture/compare timer.
PD7/TCAP is the timer input capture pin. The PD7/TCAP pin can always
be a general-purpose input, even if input capture interrupts are enabled.
Freescale Semiconductor, Inc.
For More Information On This Product,
1. Hi-Z = high impedance
2. Writing affects data register, but does not affect input.
Data Direction Bit
Parallel Input/Output (I/O) Ports
Go to: www.freescale.com
0
1
Table 7-3. Port C Pin Operation
I/O Pin Mode
Input, Hi-Z
Output
(1)
Accesses to Data Bit
Read
Latch
Pin
Table 7-3
MC68HC705P9 — Rev. 4.0
Latch
Write
Latch
summarizes the
(2)
MOTOROLA