MC68HC705P9CDW FREESCALE [Freescale Semiconductor, Inc], MC68HC705P9CDW Datasheet - Page 97

• Manufacturer Part Number: MC68HC705P9CDW
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

8.4.3 Clearing the COP Watchdog
8.5 Interrupts
8.6 COP Register
MC68HC705P9 — Rev. 4.0
MOTOROLA
NOTE:
To clear the COP watchdog and prevent a COP reset, write a logic zero
to bit 0 (COPC) of the COP register at location $1FF0.
If the main program executes within the COP timeout period, the clearing
routine needs to be executed only once. If the main program takes
longer than the COP timeout period, the clearing routine must be
executed more than once.
Place the clearing routine in the main program and not in an interrupt
routine. Clearing the COP watchdog in an interrupt routine might prevent
COP watchdog timeouts even though the main program is not operating
properly.
The COP watchdog does not generate interrupts.
The COP register is a write-only register that returns the contents of
EPROM location $1FF0 when read.
COPC — COP Clear
$1FF0
Reset:
Read:
Write:
COPC is a write-only bit. Periodically writing a logic zero to COPC
prevents the COP watchdog from resetting the MCU. Reset clears the
COPC bit.
Freescale Semiconductor, Inc.
Computer Operating Properly Watchdog (COP)
For More Information On This Product,
Bit 7
D7
U
Go to: www.freescale.com
= Unimplemented
Figure 8-1. COP Register (COPR)
D6
U
6
D5
U
5
Computer Operating Properly Watchdog (COP)
D4
U
4
U = Unaffected
D3
U
3
D2
U
2
D1
U
1
Technical Data
Interrupts
COPC
Bit 0
D0
0
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