MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 136

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

System Integration Module (SIM)
9.6 Program Exception Control
9.6.1 Interrupts
Advance Information
136
INTERRUPT
MODULE
R/W
IDB
IAB
ADDRESS
LAST
LAST INSTR.
END OF
Normal, sequential program execution can be changed in three different
ways:
At the beginning of an interrupt, the CPU saves the CPU register
contents on the stack and sets the interrupt mask (I bit) to prevent
additional interrupts. At the end of an interrupt, the RTI instruction
recovers the CPU register contents from the stack so that normal
processing can resume.
Figure 9-10
Interrupts are latched, and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. Once an interrupt is latched by
the SIM, no other interrupt can take precedence, regardless of priority,
until the latched interrupt is serviced or the I bit is cleared.
(See
SP
•
•
•
LOW BYTE
PC – 1
Figure
Figure 9-8. Interrupt Entry Timing
Interrupts
– Maskable hardware CPU interrupts
– Non-maskable software interrupt instruction (SWI)
Reset
Break interrupts
SP – 1
System Integration Module (SIM)
HIGH BYTE
shows interrupt recovery timing.
PC – 1
9-9.)
SP – 2
X
Figure 9-8
SP – 3
A
SP – 4
shows interrupt entry timing.
CCR
ADDR. HIGH
VECTOR
VECTOR
HIGH
MC68HC708AS48
ADDR. LOW
VECTOR
VECTOR
LOW
NEW PC
OPCODE
MOTOROLA
—
NEW PC
Rev. 4.0
+ 1